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(a) Schematic (not to scale) of a capacitorlike memory cell with Ag/Al top-electrode, GST active layer and Mo bottom-electrode. (b) characteristic of such a cell with layer and Ag top-electrode showing PDR switching behavior. (c) Pulse-mode operation of the cell with voltage pulses of ±1.0 V amplitude and width.
(a) Scanning electron microscope image (left) showing an array of Al top-electrode pads on GST layer. The magnified image (middle) shows a thin Au-wire ultrasonically bonded to one of the pads. Image on the right-side shows the schematic drawing of the cell. (b) characteristic of such a cell with layer and Al top-electrode showing the typical switching behavior. (c) Pulse-mode PDR switching of the cell with voltage pulses of ±1.5 V and .
(a) characteristic of a capacitorlike cell, containing stoichiometric film and Ag top-electrode, showing the absence of PDR switching behavior. (b) Variation in cell resistance for 1.25 V and pulses, (c) variation in cell resistance for 1.5 V and pulses, and (d) variation in cell-resistance for 1.5 V and pulses. ▲: positive pulses; O: negative pulses. Important to note that the results shown in [(b)–(d)] are examples of consecutive tests performed on a single cell, such that finally the cell in (d) can show variations in resistance due to the extensive electrothermal stresses imposed to the cell.
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