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The AES depth profile analysis of the studied EP-device. The insets show the simplified device structure, EP reaction on the AlGaAs layer surface, and SEM picture of the cross section of the studied device.
The forward voltage and gate leakage current as a function of inverse temperature . The inset shows the logarithmic value of versus gate-drain voltage of the EP-device at various temperatures.
The maximum transconductance , drain saturation current , and operating regime as a function of inverse temperature . The biased voltage is fixed at . The inset shows normalized and on the stress time, under stress conditions of at 420, 450, and 480 K.
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