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Floating-gate memory based on an organic metal-insulator-semiconductor capacitor
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Image of FIG. 1.

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FIG. 1.

characteristics measured at 1 kHz of a MIS structure with (○) and without (●) the gold floating gate. The inset shows the structure of the floating gate device.

Image of FIG. 2.

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FIG. 2.

characteristics of the same control MIS (●) and floating gate memory (○) devices used for the measurements in Fig. 1. The inset is a diagram showing the changes in potential distribution that occur in the two PSQ layers when the voltage is swept from depletion to accumulation. The dotted lines show the average electric fields for the maximum voltages applied.

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/content/aip/journal/apl/95/9/10.1063/1.3223606
2009-09-04
2014-04-23

Abstract

A floating gate memory element is described which incorporates an evaporated goldfilm embedded in the gate dielectric of a metal-insulator-semiconductor capacitor based on poly(3-hexylthiophene). On exceeding a critical amplitude in the voltage sweep, hysteresis is observed in the capacitance-voltage and current-voltage characteristics of the device. The anticlockwise hysteresis in is consistent with strong electron trapping during the positive cycle but little hole trapping during the negative cycle. We argue that the clockwise hysteresis observed in the negative cycle of the plot, arises from leakage of trapped holes through the underlying insulator to the control gate.

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Scitation: Floating-gate memory based on an organic metal-insulator-semiconductor capacitor
http://aip.metastore.ingenta.com/content/aip/journal/apl/95/9/10.1063/1.3223606
10.1063/1.3223606
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