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(a) Design of the Si/SiGe heterostructure for both p-channel and n-channel FETs. (b) The corresponding energy band diagram.
The drain-source current of a (a) p-channel and an (b) n-channel FET at drain-to-source bias −10 mV and (b) , respectively. The measurement temperature was 4.2 K.
Longitudinal and Hall resistance at 0:3 K. Filling factors of prominent quantum Hall states are labeled.
(a) Transfer curve of an inverter consisting of a p-channel FET and an n-channel FET at 4:2 K. The supply voltage is 4 V. The inset shows the drain-source current-voltage characteristics of a p-channel FET at 4.2 K. (b) A schematic of the inverter circuit.
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