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Charge sensing in intrinsic silicon quantum dots
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View: Figures


Image of FIG. 1.
FIG. 1.

(a) False color scanning electron microscopy image of a representative device showing both SET and QD. The top gates are shown horizontally with the QD (SET) at the top (bottom). The two barrier gates, shown vertically, are common to both devices and are used to locally deplete the 2DEG. (b) Electrical transport measurement of the QD device taken with barrier potentials over a top gate range representative of that used for charge sensing. The SET gate potential is held at 0 V for this measurement.

Image of FIG. 2.
FIG. 2.

Electrical transport measurements of both the SET and QD as a function of QD gate and SET gate. (a) Conductance of the QD (top) and SET (bottom) measured simultaneously. A lock-in excitation of was used on the QD and on the SET. (b) Line plots extracted from (a) at for both the QD (top) and SET (bottom).

Image of FIG. 3.
FIG. 3.

Direct conductance measurements of the (a) QD and (b) SET over a small gate range. (c) Schematic of the “honeycomb” pattern for coupled QDs overlaid on a superposition of plots [(a) and (b)].


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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Charge sensing in intrinsic silicon quantum dots