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High quality solution processed carbon nanotube transistors assembled by dielectrophoresis
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10.1063/1.3327521
/content/aip/journal/apl/96/8/10.1063/1.3327521
http://aip.metastore.ingenta.com/content/aip/journal/apl/96/8/10.1063/1.3327521

Figures

Image of FIG. 1.
FIG. 1.

(a) Schematic of the electrode array and DEP assembly setup. (b) Representative SEM image of an individual SWNT between source (s) and drain (d) electrodes. Scale bar: 500 nm. (c) AFM image of the same SWNT in (b). Scale bar: 500 nm. (d) Height profile of the SWNT showing a diameter of . (e) Schematic diagram of device geometry and electronic transport measurement setup.

Image of FIG. 2.
FIG. 2.

(a) Transfer characteristics of a representative SWNT FET device at , −0.5, −1.0, and −2.0 V. (b) Output characteristics showing currents up to in the saturation regime.

Image of FIG. 3.
FIG. 3.

(a) Scatter plot of mobility vs on-conductance for 35 FET devices. The median values of mobility and on-conductance are and , respectively. (b) vs at for our highest performance FET device . Inset: Mobility vs gate voltage showing a peak mobility value of . (c) Representative Raman spectroscopy of an individual SWNT device.

Tables

Generic image for table
Table I.

Comparison of some recent SWNT solution processed device parameters, this work, and one CVD SWNT made by direct growth methods (N/R: Not reported).

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/content/aip/journal/apl/96/8/10.1063/1.3327521
2010-02-25
2014-04-19
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: High quality solution processed carbon nanotube transistors assembled by dielectrophoresis
http://aip.metastore.ingenta.com/content/aip/journal/apl/96/8/10.1063/1.3327521
10.1063/1.3327521
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