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Implementing as gate dielectric for Ge-channel complementary metal-oxide-semiconductor devices by using interlayer
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10.1063/1.3490710
/content/aip/journal/apl/97/11/10.1063/1.3490710
http://aip.metastore.ingenta.com/content/aip/journal/apl/97/11/10.1063/1.3490710
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(a) Gate leakage characteristics of Pt-gated MOSCAPs, (b) Energy band diagram of structures, according to literature reports: CBO and VBO of interface (Ref. 17); CBO and VBO of interface (Ref. 10).

Image of FIG. 2.
FIG. 2.

characteristics of on p-Ge(100) with ILs (a), (b), and (c) capacitors.

Image of FIG. 3.
FIG. 3.

hysteresis characteristics for the (a) and (b) .

Image of FIG. 4.
FIG. 4.

characteristics of on n-Ge(100) with ILs. The structure of the gate stacks is (a) and (b).

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/content/aip/journal/apl/97/11/10.1063/1.3490710
2010-09-16
2014-04-23
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Implementing TiO2 as gate dielectric for Ge-channel complementary metal-oxide-semiconductor devices by using HfO2/GeO2 interlayer
http://aip.metastore.ingenta.com/content/aip/journal/apl/97/11/10.1063/1.3490710
10.1063/1.3490710
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