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Nonlinear electrical properties of Si three-terminal junction devices
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10.1063/1.3526725
/content/aip/journal/apl/97/24/10.1063/1.3526725
http://aip.metastore.ingenta.com/content/aip/journal/apl/97/24/10.1063/1.3526725
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

SEM image of the fine structure part of a three-terminal junction device fabricated in a SOI structure with a 45-nm-thick Si layer using EBL and ICP-RIE, and a schematic for the measurement circuit setup. The dark areas were etched down to the layer. In the device, the three point contacts were about 120 nm wide and the distance between the left and right point contacts was about 160 nm. Left (L), right (R), and center (C) terminals are marked in the image.

Image of FIG. 2.
FIG. 2.

Electrical measurements of the Si three-terminal junction device shown in Fig. 1. The solid curve shows the measured voltage at the central terminal with voltages and applied to the left and right terminals in a push-pull configuration of . The dashed-dotted curve shows the measurements of voltage with push-pull bias voltages of applied to the left and central terminals. The dashed curve shows the measurements of voltage with push-pull bias voltages of applied to the central and right terminals. The inset shows the same measurements in a large range of bias voltages.

Image of FIG. 3.
FIG. 3.

Electrical measurements of output voltage for four Si three-terminal junction devices under voltages and applied to the left and right terminals in a push-pull configuration of . Here, the four devices were fabricated on the same wafer with a 45-nm-thick Si layer. The four devices had the terminal widths of , 130, 130, and 120 nm and the distances between the left and right terminals of , 160, 170, and 165 nm, respectively. Note that the device with and was the device as shown in Fig. 1. The inset shows the same measurements in a large range of bias voltages.

Image of FIG. 4.
FIG. 4.

Electrical measurements of Si three-terminal junction devices fabricated on SOI structures with different Si layer thicknesses. In the measurements, the voltages were applied to the left and right terminals of a device in a push-pull configuration of and the voltage output is plotted as a function of . The device made on a 45-nm-thick Si layer was the device as shown in Fig. 1. The device made on a 100-nm-thick Si layer had the terminal width of 130 nm and the distance between the left and right terminals of 230 nm. The device made on a 180-nm-thick Si layer had the terminal width of 135 nm and the distance between the left and right terminals of 230 nm. The inset shows the same measurements in a large range of bias voltages.

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/content/aip/journal/apl/97/24/10.1063/1.3526725
2010-12-13
2014-04-25
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Nonlinear electrical properties of Si three-terminal junction devices
http://aip.metastore.ingenta.com/content/aip/journal/apl/97/24/10.1063/1.3526725
10.1063/1.3526725
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