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Prospect of charge enhancement by increasing top oxide thickness of silicon-on-insulator fin field effect transistors
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10.1063/1.3634045
/content/aip/journal/apl/99/10/10.1063/1.3634045
http://aip.metastore.ingenta.com/content/aip/journal/apl/99/10/10.1063/1.3634045
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

Inversion charge concentration vs. silicon fin width for TG and DG FinFETs at a gate voltage of 0.3 V. The inset shows a schematic diagram of FinFET cross-section.

Image of FIG. 2.
FIG. 2.

Difference of the first two subband minima with respect to the variation of fin thickness for TG and DG FinFETs.

Image of FIG. 3.
FIG. 3.

(Color online) Contour profile of inversion charge concentration for TG and DG FinFETs having fin width of 4 nm and 6 nm at a gate voltage of 0.3 V.

Image of FIG. 4.
FIG. 4.

Variation of (a) gate capacitance and (b) ballistic current with respect to the variation of fin width for TG and DG FinFEETs at a gate voltage of 0.3 V.

Image of FIG. 5.
FIG. 5.

(a) Dependence of on-state current on top oxide thickness and (b) ratios of the top and side surface potentials with respect to the variation of top oxide thickness.

Image of FIG. 6.
FIG. 6.

(a) Inversion charge concentration and (b) ballistic current with respect to the variation of top oxide thickness for fin widths of 10 nm and 6 nm at a gate voltage of 0.3 V.

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/content/aip/journal/apl/99/10/10.1063/1.3634045
2011-09-08
2014-04-21
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Prospect of charge enhancement by increasing top oxide thickness of silicon-on-insulator fin field effect transistors
http://aip.metastore.ingenta.com/content/aip/journal/apl/99/10/10.1063/1.3634045
10.1063/1.3634045
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