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(Color online) Transistor device structure. Shown in the picture is the structure of the buried channel device. For the surface channel device the 3 nm InP cap is removed during the recess.
(Color online) C-V characteristics (collected at 15 frequencies swept logarithmically from 1 kHz to 1 MHz) of the surface channel (a,b) and the buried channel (c,d) devices with either HCl (a,c) or ASV (b,d) treatments prior to the gate oxide deposition.
(Color online) (a) Drive current (Ion) and (b) the peak transconductance (gm) as a function of the gate length for ASV and HCl treated surface channel and buried channel devices.
(Color online) Drain current versus the gate voltage for the HCl and ASV treated surface channel (SC) and buried channel (BC) devices.
(Color online) XPS spectrum of the In3d peak indicates the efficiency of ASV treatment in avoiding native oxide formation.
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