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Long hold times in a two-junction electron trap
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10.1063/1.3647557
/content/aip/journal/apl/99/14/10.1063/1.3647557
http://aip.metastore.ingenta.com/content/aip/journal/apl/99/14/10.1063/1.3647557
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(Color online) (a) Circuit diagram of the trapping device and schematic of the sample stage of cryostat CA. The outer shield is a ø14 cm cylinder mounted to the flange by a thread. The powder filters, screwed to the flange, are used as rf-tight feedthroughs. The signal lines (two of which are shown) are shielded all the way from the filters to the box-shaped inner shield, which is mounted with a D connector and closed with screws. The number of electrons on the normal-metal (AuPd) middle island, n 1, and on the superconducting (Al) trap island, n 2, can be controlled by the voltages V b and V g. (b) Simulated contour plot of τ at 120 mK for four charge configurations (n 1, n 2) as a function of (n g, V b), n g ≡ C g V g/e. Bright and dark areas denote long and short values of τ, respectively. In the bistable areas, the largest values of τ are plotted. Inclined rectangles around each stable charge state correspond to τ = 1 s escape thresholds. Two inclined solid lines show the middle points of the hysteresis loops for the states (0, 0)–(0, 1) and (1, 0)–(1, 1). (c) Repeated V b sweeps around the widest hysteresis loop of about 1.4 mV, emphasized by the rectangle corresponding to the wide grey vertical line in (b). The dashed line in the middle denotes the symmetric case, with equal values of τ for both charge states involved. Inset: Electrometer signal I el as a function of gate charge n g,el = C g,el V g,el/e. The circle denotes a typical operating point. (d) Random switchings of the trap between two charge states. The trap is tuned to exhibit experimentally convenient hold times by setting the width of the hysteresis loop to about 100 μV. The central panel shows the symmetric case with V b set in the middle of a hysteresis loop (ΔV b = 0), while the upper and lower traces are for which favor one of the states.

Image of FIG. 2.
FIG. 2.

(Color online)(a) Average hold time τ of two charge states as a function of bias voltage deviation ΔV b from the middle of the hysteresis loop measured at three different levels of the electrometer current: I el < 100 pA (squares), I el ≈ 300 pA (circles), and I el ≈ 750 pA (triangles). Open and filled symbols of the same type correspond to the two alternating charge states within the trace: n 2 = 0 and n 2 = 1, respectively [see Figs. 1(c) and 1(d)]. For each I el, V g was adjusted such that τ ≈ 1 s at ΔV b = 0. (b) Summarizing plot: hold time τ vs. energy barrier ΔE. The line shows the slope corresponding to thermal activation at T * = 120 mK. Symbols are as in (a). Diamonds and pentagons were measured at I el < 100 pA with a wider hysteresis loop than squares.

Image of FIG. 3.
FIG. 3.

(Color online) (a) Electrometer data trace at the maximum hysteresis shown in Fig. 1(c) and at low I el. The trap state changed only once at t ≈ 14 h. Slow drifts in I el are caused by background charge fluctuations of the electrometer. (b) Switching trace at the maximum hysteresis with higher I el > 500 pA. (c) Normal state switching trace for sample SB.

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/content/aip/journal/apl/99/14/10.1063/1.3647557
2011-10-05
2014-04-18
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Long hold times in a two-junction electron trap
http://aip.metastore.ingenta.com/content/aip/journal/apl/99/14/10.1063/1.3647557
10.1063/1.3647557
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