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(Color online) (a) Typical bipolar I-V characteristics of TiN/HfOx/AlOx/Pt resistive switching memory device. Multilevel HRS resistances are achieved by controlling the reset stop voltage. (b) Nyquist plot from impedance (Z) spectroscopy by applying 10 mV AC small signal (100 Hz–1 MHz). A semicircle in the main figure suggests that the memory cell in HRS is a parallel of resistor and capacitor. The points that cluster near the Re(Z) axis in the inset figure suggest that the memory cell in LRS is shunted by CFs.
(Color online) Cell total conductance versus the applied AC small signal frequency for (a) typical LRS and HRS under different DC bias voltages and for (b) different HRS resistance levels. LRS conductance remains its DC value, while HRS conductance exceeds its DC value when passing a particular corner frequency. The higher the resistance is, the lower the corner frequency is.
(Color online) AC conductance versus the applied AC small signal frequency for (a) different DC bias voltages and for (b) different HRS resistance levels. Independent of the DC bias voltages or the resistance states, a universal f 2 trend is obtained.
(Color online) Schematic of the DC and AC conduction processes through the memory stack. The circles are the oxygen vacancies. The bottleneck of the DC conduction in HRS is the tunneling from the electrode to the residual CFs (red arrows and text). The AC conduction arises from the electron hopping between the nearest neighbor traps within the residual CFs (purple arrows and text).
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