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Effects of interface roughness scattering on radio frequency performance of silicon nanowire transistors
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View: Figures


Image of FIG. 1.
FIG. 1.

The simulated silicon nanowire with rough surface in the channel: the root-mean-square roughness height Δ rms and the correlation length Lm are adopted from Ref. 9. The crystal orientation 〈110〉 is selected for the electron transport direction. The source/drain doping density Ns /Nd is set to 5 × 1020 cm−3. The diameter of the nanowire d Si varies from 2, 2.5, 3 to 4 nm. The length of the source/drain extension region Ls /Ld , the gate length Lg , and the oxide thickness t ox are shown in the figure. The channel of the nanowire is undoped.

Image of FIG. 2.
FIG. 2.

(a) The cut-off frequency (f T), (b) the transconductance (g m,on), (c) the total gate capacitance C g,tot vs diameter d Si at the on-state with the gate bias Vgs  ∼ Vth  + 0.4 V with the oxide capacitance where is the dielectric constant of the oxide, and (d) the transconductance vs gate overdrive for 100 rough nanowire samples (errorbar: standard deviation). All the values except fT are normalized with the perimeter of the NW.

Image of FIG. 3.
FIG. 3.

The density of states D(x,E) in a logarithmic scale for (a) a smooth NW or (b) a rough NW resolved in the transport axis x and the energy E near the on-state with Vgs  ∼ Vth  + 0.4 V. The channel of the SiNWT starts from x = 10 nm and extends to x = 25 nm.

Image of FIG. 4.
FIG. 4.

(Color online) (a) The average electron velocity at the on-state for NWs with a different diameter and (b) the electron velocity along the channel at the on-state for rough NWs with diameter 2 nm (errorbar: standard deviation).

Image of FIG. 5.
FIG. 5.

(Color online) The electron density from source to drain for (top) the smooth NW and (bottom) the rough NW (the same sample selected for Fig. 3) at the on-state with Vgs  ∼ Vth  + 0.4 V.


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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Effects of interface roughness scattering on radio frequency performance of silicon nanowire transistors