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Unipolar memristors enable “stateful” logic operations via material implication
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10.1063/1.3624895
/content/aip/journal/apl/99/7/10.1063/1.3624895
http://aip.metastore.ingenta.com/content/aip/journal/apl/99/7/10.1063/1.3624895

Figures

Image of FIG. 1.
FIG. 1.

(Color online) (a) The IMP circuit with one resistor and two memristors. (b) Cross-sectional SEM image of the STO thin film. The region between the two arrows shows the thickness of STO thin films. (c) The schematic drawing of I-V measurement system of Au/SrTiO3/Pt devices. (d) Unipolar resistive switching behaviors of Au/SrTiO3/Pt devices in the DC mode. The low-resistance switch (closed state) and the high-resistance switch (open state) are defined as the logic value “1” and “0”, respectively. Trace reset shows a closed-to-open transition and trace set with 10 mA CC shows an open-to-closed transition. (e) Switch toggling by pulsed voltages (1 ms long; V SET = −6 V and V CLEAR = −2.5 V).

Image of FIG. 2.
FIG. 2.

The experimental results of demonstrating IMP operations. IMP is performed by two simultaneous voltage pulses, V COND, and V SET, applied to switches P and Q, respectively. The p and q show the current value read at switch P and Q before the IMP voltage pulses, and the p′ and q′ show the current value after the IMP pulses. The switch states are read at −0.2 V.

Image of FIG. 3.
FIG. 3.

(Color online) (a) The graphical method to determine the appropriate series resistance R G. The I-V curves of open and closed states and of R G (500 Ω) are plotted. The solid vertical lines show the voltage drops across the memristor in open state and R G in series for a −3 V applied voltage (i.e., I A = I B, V A + V B = −3 V), and the dash vertical lines show the voltage drops across the memristor in closed state and R G in series (i.e., I A′ = I B′, V A′ + V B′ = −3 V). (b) The ratio between the energy consumption on R G and general consumption as a function of the R G resistance value.

Tables

Generic image for table
Table I.

The calculation results of the voltage drops (V DROP) on P and Q switches during the IMP operation. The V COND and V SET are chosen as −3 and −6V. The resistance of Au/STO/Pt devices in the LR state is taken as an average value of 35 Ω. The two voltage drop values in the bracket are corresponding to the resistances of 104 and 105 Ω in the HR state, respectively, which are obtained from Fig. 1S in supplementary material (Ref. 15).

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/content/aip/journal/apl/99/7/10.1063/1.3624895
2011-08-15
2014-04-18
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Unipolar memristors enable “stateful” logic operations via material implication
http://aip.metastore.ingenta.com/content/aip/journal/apl/99/7/10.1063/1.3624895
10.1063/1.3624895
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