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High-speed strained-single-crystal-silicon thin-film transistors on flexible polymers
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10.1063/1.2214301
/content/aip/journal/jap/100/1/10.1063/1.2214301
http://aip.metastore.ingenta.com/content/aip/journal/jap/100/1/10.1063/1.2214301
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Figures

Image of FIG. 1.
FIG. 1.

(Color online) Schematic process flow for transferring single-crystalline structure to a flexible-polymer host and TFT fabrication. (a) Begin with ITO-coated PET host. (b) Spin on SU8-2002 as adhesive dielectric layer. (c) Begin with SOI substrate for active layer preparation. (d) Grow SiGe and Si layers on SOI (this step is skipped for unstrained case). Only the SiGe alloy layer is compressively strained at this stage. (e) The active layer is dry etched into strips and the BOX layer is selectively etched by concentrated HF. The structure sits on the Si substrate and the two thin Si layers are now tensile strained due to strain sharing. (f) The starting substrate is brought upside down in contact with the adhesive layer. (g) The active layer is transferred to the plastic host. (h) Deposit source and drain contact metal (Ti).

Image of FIG. 2.
FIG. 2.

(Color online) Optical-microscope images. (a) As-transferred unstrained Si strips. The inset shows a magnified image. (b) Finished devices on unstrained Si. The rectangles are -thick Ti metal pads that are patterned on the Si strips, which run horizontally. The distances between the edges of the metal pads are 10, 5, and , which correspond to different channel lengths. Measurements are made between neighboring metal pads. Because the metal pads cover three strips, the gate width is thus . (c) Finished devices on strained Si, same conditions as in (b).

Image of FIG. 3.
FIG. 3.

(Color online) XRD line scan results. (a) An average over released and unreleased portions of a membrane structure on the starting SOI substrate. The arrows indicate a 0.11° angular shift of both the SiGe alloy peak and the Si thin-film peak for the released portions of the membrane relative to the unreleased portions, because of strain sharing in the released portion. The Si peak for the unreleased portion is at the same angle as the bulk-Si peak as expected. The membrane peaks are broad because the layers are thin (averaged lines are drawn to assist the observation). (b) Diffraction from a released, strain-relaxed membrane and an unstrained Si layer transferred onto polymer hosts, and after TFT fabrication. A small systematic shift of the peaks relative to the relaxed, nontransferred [Fig. 3(a)] membrane is observed and is likely due to the flexibility of the polymer.

Image of FIG. 4.
FIG. 4.

(Color online) dc characteristics of the TFTs. (a) and (b) Representative curves of a gate length TFT fabricated on unstrained and strained Si, respectively. The gate voltage varies from in intervals. (c) Drain current and (d) transconductance comparison between unstrained and strained-Si TFTs. The gate length from top to bottom is 3, 10, 20, and for both samples. is .

Image of FIG. 5.
FIG. 5.

(Color online) Extracted field-effect mobility of unstrained- and strained-Si TFTs on flexible-polymer hosts.

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/content/aip/journal/jap/100/1/10.1063/1.2214301
2006-07-14
2014-04-17
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: High-speed strained-single-crystal-silicon thin-film transistors on flexible polymers
http://aip.metastore.ingenta.com/content/aip/journal/jap/100/1/10.1063/1.2214301
10.1063/1.2214301
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