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Effect of channel positioning on the noise in silicon-on-insulator metal-oxide-semiconductor field-effect transistors
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10.1063/1.2433772
/content/aip/journal/jap/101/3/10.1063/1.2433772
http://aip.metastore.ingenta.com/content/aip/journal/jap/101/3/10.1063/1.2433772
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

Normalized drain current noise at plotted vs gate voltage overdrive for SOI and bulk Si . .

Image of FIG. 2.
FIG. 2.

The simulated average carrier distance from the front gate oxide interface in the SOI plotted for different back gate voltages. SCHRED (Ref. 15) was used for the simulations with the following parameters: Doping Si (acceptor), front oxide , Si body , and buried oxide . The inset shows a schematic cross section of the SOI structure and the hole distribution in the Si body.

Image of FIG. 3.
FIG. 3.

(Color online) Drain current noise power spectral density plotted vs frequency for the SOI biased at three different back gate voltages. .

Image of FIG. 4.
FIG. 4.

Normalized drain current noise at plotted vs back gate voltage for the SOI . The drain current was held constant at 67, 123, or , which corresponded to a , 0.65, or , respectively, when .

Image of FIG. 5.
FIG. 5.

(Color online) The extracted Hooge parameter studied vs the simulated average carrier-oxide distance for the SOI and bulk Si . The plotted data were obtained from different types of experiments where one or two terminal voltages were varied. The dotted line is a curve fit using the empirical equation with , , and .

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/content/aip/journal/jap/101/3/10.1063/1.2433772
2007-02-13
2014-04-20
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Effect of channel positioning on the 1∕f noise in silicon-on-insulator metal-oxide-semiconductor field-effect transistors
http://aip.metastore.ingenta.com/content/aip/journal/jap/101/3/10.1063/1.2433772
10.1063/1.2433772
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