1887
banner image
No data available.
Please log in to see this content.
You have no subscription access to this content.
No metrics data to plot.
The attempt to load metrics for this article has failed.
The attempt to plot a graph for these metrics has failed.
Strongly coupled multiple-dot characteristics in dual recess structured silicon channel
Rent:
Rent this article for
USD
10.1063/1.2885343
/content/aip/journal/jap/103/4/10.1063/1.2885343
http://aip.metastore.ingenta.com/content/aip/journal/jap/103/4/10.1063/1.2885343
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

SEM image of a typical fabricated recess structured silicon channel with PECVD deposited silicon dioxide.

Image of FIG. 2.
FIG. 2.

Schematic diagrams for the possible location of (a) single-dot in device A ( oxidation) and (b) multiple-dot (dotted oval regions) in device B ( oxidation). (c) Simplified equivalent circuit of device B. (d) Schematic illustration of the evolution of individual recess into a single tunnel junction in device A and a single dot in device B.

Image of FIG. 3.
FIG. 3.

Measured drain current versus drain voltage for the various voltages of and with at . Decrease in the device resistance due to the increase in the recess gates potential demonstrates the resistance controllability of the device.

Image of FIG. 4.
FIG. 4.

Coulomb oscillation characteristics of device A for the gate G4 at . Gates G1 and G3 were grounded.

Image of FIG. 5.
FIG. 5.

Contour plot of the drain current as a function of and at of device A with and .

Image of FIG. 6.
FIG. 6.

Measured Coulomb oscillation characteristics of device B for the gate G4 at . Gates G1 and G3 were grounded.

Image of FIG. 7.
FIG. 7.

(a) Measured drain current contour plot as a function of and at of device B. and . (b) Drain current versus for various values at of device B along the dotted line shown in the Fig. 7(a), and . Shift in the conductance peaks with is marked by the dotted line for the first peak splitting. Data were plotted with drain current offset for the different voltages for clarity.

Image of FIG. 8.
FIG. 8.

Temperature depends of the drain current as a function of at , , and of device B [along the dotted line shown in the Fig. 7(a)] for and during thermal cycle 3. Conductance characteristic (shown by dotted lines) is not affected by the different drain voltages or temperatures.

Image of FIG. 9.
FIG. 9.

Monte Carlo simulation drain current contour plot as a function and at , , and using the equivalent circuits shown in Fig. 2(c) with outer tunnel junction capacitances of and inner tunnel junction capacitances of .

Loading

Article metrics loading...

/content/aip/journal/jap/103/4/10.1063/1.2885343
2008-02-29
2014-04-23
Loading

Full text loading...

This is a required field
Please enter a valid email address
752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Strongly coupled multiple-dot characteristics in dual recess structured silicon channel
http://aip.metastore.ingenta.com/content/aip/journal/jap/103/4/10.1063/1.2885343
10.1063/1.2885343
SEARCH_EXPAND_ITEM