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Effect of local electrical properties on the electrostatic discharge withstand capability of multilayered chip ZnO varistors
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10.1063/1.2949262
/content/aip/journal/jap/104/1/10.1063/1.2949262
http://aip.metastore.ingenta.com/content/aip/journal/jap/104/1/10.1063/1.2949262

Figures

Image of FIG. 1.
FIG. 1.

Schematic of device preparation procedure using the doctor-blade, screen printing, and lamination techniques.

Image of FIG. 2.
FIG. 2.

Photograph and schematic structure of the fabricated device.

Image of FIG. 3.
FIG. 3.

Schematic waveforms of (a) an ESD pulse before and after application to the varistor and (b) lightning surge current.

Image of FIG. 4.
FIG. 4.

Schematic electrical circuit based on HBM for ESD endurance tests.

Image of FIG. 5.
FIG. 5.

(a) Schematic of the apparatus used for SSPM measurement. (b) Distributions of the surface potential and resistance of grains and grain boundaries under the application of a dc voltage. (c) Results of SSPM measurement of the Pr–ZnO varistor.

Image of FIG. 6.
FIG. 6.

characteristics of the (a) Bi–ZnO and (b) Pr–ZnO varistors before (solid lines) and after (open circles) the application of 30 kV ESD pulses.

Image of FIG. 7.
FIG. 7.

characteristics of the Bi–ZnO varistor before and after the application of ESD pulses with different voltages in the range of . (a) and (b) show characteristics in the forward and reverse directions, respectively. The solid lines represent the initial characteristics.

Image of FIG. 8.
FIG. 8.

Degradation tendencies of leakage current, , and electrical nonlinearity ( and ). The solid circles and squares represent these quantities in the forward and reverse directions, respectively.

Image of FIG. 9.
FIG. 9.

SIM images of regions between the inner electrodes of the (a) Bi–ZnO and (b) Pr–ZnO varistors.

Image of FIG. 10.
FIG. 10.

(a) and (b) are the AFM images of the Bi–ZnO and Pr–ZnO varistors, respectively. (c) and (d) are the SSPM images of the Bi–ZnO and Pr–ZnO varistors, respectively, under a dc voltage of 8 V.

Image of FIG. 11.
FIG. 11.

Line-scan profiles of the surface potential (open squares) and resistance (solid lines) estimated from the surface potential change in the [(a) and (b)] Bi–ZnO and [(c) and (d)] Pr–ZnO varistors.

Image of FIG. 12.
FIG. 12.

Distributions of resistance in the (a) Bi–ZnO and (b) Pr–ZnO varistors.

Image of FIG. 13.
FIG. 13.

Schematic band diagrams of a Bi–ZnO varistor near the cathode. Electronic band structure (a) in the absence of bias and (b) under the application of a high-voltage bias such as an ESD pulse. (c) and (d) are the electronic band structures after the application of ESD pulses with voltages equal to and greater than 8 kV, respectively. The heights of the DSB and Schottky barriers are denoted by and , respectively. The dashed line represents the path of conduction electrons under reverse bias.

Tables

Generic image for table
Table I.

Chemical compositions of Bi–ZnO and Pr–ZnO varistors.

Generic image for table
Table II.

Electrical nonlinearity ( and ), breakdown voltage , and ESD and surge current withstand capabilities.

Generic image for table
Table III.

Leakage current, breakdown voltage , and nonlinearity of Bi–ZnO varistor before and after the application of various ESD voltage pulses.

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/content/aip/journal/jap/104/1/10.1063/1.2949262
2008-07-03
2014-04-18
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Effect of local electrical properties on the electrostatic discharge withstand capability of multilayered chip ZnO varistors
http://aip.metastore.ingenta.com/content/aip/journal/jap/104/1/10.1063/1.2949262
10.1063/1.2949262
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