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Slow trap charging and detrapping in the negative bias temperature instability in HfSiON dielectric based field effect transistors
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10.1063/1.3039997
/content/aip/journal/jap/104/12/10.1063/1.3039997
http://aip.metastore.ingenta.com/content/aip/journal/jap/104/12/10.1063/1.3039997
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

Variation in (◻) the fractional threshold voltage shift and (○) fractional mobility shift as a function of time for devices biased at out of 4380 s and then relaxed at 0 V out of another 4380 s. The device temperature was 398 K.

Image of FIG. 2.
FIG. 2.

Variation in the threshold voltage shift (a) and mobility ratio (b) as a function of bias stress time at the four temperatures studied: (◻) 293 K, (○) 363 K, (△) 398 K, and (▽) 433 K. Out of 4380 s the device was biased with respect to the source, drain, and body contacts. From 4380 to 8760 s all of the contacts were shorted.

Image of FIG. 3.
FIG. 3.

Breakdown of the 433 K data in Fig. 3 into interface state (◻) and oxide trapped charge (△) components. Absolute values and temperature variations are dominated by the oxide trapped charge term.

Image of FIG. 4.
FIG. 4.

Plots of vs for data such as that in Figs. 2(a) and 2(b).

Image of FIG. 5.
FIG. 5.

Plots of (○) and (△) vs reciprocal absolute temperature for fits of the expression to the experimental data which includes approximate estimation of the rapid relaxation component.

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/content/aip/journal/jap/104/12/10.1063/1.3039997
2008-12-19
2014-04-17
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Slow trap charging and detrapping in the negative bias temperature instability in HfSiON dielectric based field effect transistors
http://aip.metastore.ingenta.com/content/aip/journal/jap/104/12/10.1063/1.3039997
10.1063/1.3039997
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