Schematic structure of MOs transistor, the gate dielectric is divided between pure and embedded layers.
FN plot of pure and embedded with nc-Si and CNTs.
FN plot of high- and embedded with nanoparticles nc-Si and CNTs.
FN tunneling current in pure dielectric and nanoparticles embedded composite dielectrics.
FN tunneling current in pure and in embedded with nanoparticles.
Direct tunneling current at positive gate voltages with pure and composite gate dielectrics.
Direct tunneling current at negative gate voltages with pure and composite high- gate dielectrics.
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