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Sub- equivalent oxide thickness scaling using hafnium zirconate dielectric with tantalum carbide gate
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10.1063/1.3009970
/content/aip/journal/jap/104/9/10.1063/1.3009970
http://aip.metastore.ingenta.com/content/aip/journal/jap/104/9/10.1063/1.3009970

Figures

Image of FIG. 1.
FIG. 1.

Graphical representation of CET vs thickness of high- dielectric .

Image of FIG. 2.
FIG. 2.

XTEM micrograph of NMOSFET.

Image of FIG. 3.
FIG. 3.

ATR-FTIR of stack.

Image of FIG. 4.
FIG. 4.

NMOS characteristics of devices.

Image of FIG. 5.
FIG. 5.

NMOS gate leakage current density as a function of CET.

Image of FIG. 6.
FIG. 6.

characteristics of NMOSFET .

Image of FIG. 7.
FIG. 7.

Normalized characteristics of and devices .

Image of FIG. 8.
FIG. 8.

instability for NMOSFET .

Image of FIG. 9.
FIG. 9.

(a) N XPS of with PDA, (b) O XPS of with PDA, (c) XPS of with PDA, and (d) XPS of with PDA.

Image of FIG. 10.
FIG. 10.

N SIMS depth profiling from NMOSFET.

Image of FIG. 11.
FIG. 11.

(a) Film density and (b) film thickness as measured by XRR.

Image of FIG. 12.
FIG. 12.

XTEM micrograph of NMOSFET.

Image of FIG. 13.
FIG. 13.

Graphical representation of EOT vs .

Image of FIG. 14.
FIG. 14.

Pictorial representation of CET scaling of with PDA.

Tables

Generic image for table
Table I.

Approaches used for IL scaling, IL increase, and high- boost.

Generic image for table
Table II.

Overall benefits of these scaling methods.

Generic image for table
Table III.

NMOS device results with approximately .

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/content/aip/journal/jap/104/9/10.1063/1.3009970
2008-11-13
2014-04-20
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Sub-9 Å equivalent oxide thickness scaling using hafnium zirconate dielectric with tantalum carbide gate
http://aip.metastore.ingenta.com/content/aip/journal/jap/104/9/10.1063/1.3009970
10.1063/1.3009970
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