cycled loops by dc voltage conditioning under the condition of interval of 0.1 s, cycle frequency 100 Hz, maximal voltage 20 V, and maximal current 1 A at different temperatures and for different cycles. The loop goes , as the arrow shown in Fig. 1(a). (a) Seven cycles at 420 K. (b) Seven cycles at 350 K (inset shows the linear change after about 28 cycles at 350 K). (c) 40 cycles at 296 K (the linear change at advanced voltage at 296 K).
curves measured at 150 K for different intervals of 0.01 s, 1 s, 3 s, and 5 s, respectively, (the inset shows the small change in current at the interval 5 s).
Temperature dependence of dielectric dispersion before and after conditioning when the dc voltage was removed: (a) before and (b) after the conditioning.
Dielectric dispersion for several different conditions after cycles at 296 K.
(a) (Color online) Sketch of the ceramic microstructure and the equivalent capacitance network. field perpendicular boundary capacitance, field perpendicular boundary resistance field field parallel boundary capacitance, parallel boundary resistance. The network has to be doubled in case of dipole orientational discrimination (b), energy levels of charges located predominantly at the boundaries at and the different redistribution onto two different positions when , position 1 (emitter) and position 2 (collector).
Sketch of the additional dipole produced during the trap site occupation. The left side picture indicates the empty trap site which has a coincident center of the positive and negative charges. The right side shows that an additional dipole comes out when a negative charge gets trapped at the center and displaces a positive charge. Dashed line connecting the positive charges: bipolar axis.
Barrier changes with conditioning cycles and voltages at different temperatures.
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