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Effect of annealing ambient and temperature on the electrical characteristics of atomic layer deposition Al2O3/In0.53Ga0.47As metal-oxide-semiconductor capacitors and MOSFETs
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10.1063/1.3686628
/content/aip/journal/jap/111/4/10.1063/1.3686628
http://aip.metastore.ingenta.com/content/aip/journal/jap/111/4/10.1063/1.3686628
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Figures

Image of FIG. 1.
FIG. 1.

(Color online) (a) C-V for Pt/Al2O3/n-InGaAs with 50, 70, and 100 cycles of ALD. The as-deposited samples have an oxide thickness dependent VFB shift which indicates the presence of significant oxide charge. (b) After a FGA at 400 °C for 30 min there is VFB alignment across all thicknesses. Inset: C-V for 100 cy of Al2O3 showing a steeper C-V transition after FGA.

Image of FIG. 2.
FIG. 2.

(Color online) MOSCAP C-V of Pt/Al2O3/n-InGaAs across many frequencies from 1 kHz to 1 MHz. (a) As-deposited, there is significant frequency dependent VFB shift. From the high frequency - low frequency (HF-LF) measurements (Ref. 9), we measured a midgap DIT of 5.3 × 1012 cm−2 eV−1. (b) After FGA at 400 °C for 30 min, the frequency dependent VFB shift is greatly reduced from 380 to 100 mV, along with a factor of 3 reduction in the midgap DIT to1.6 × 1012 cm−2 eV−1 (Fig. 6).

Image of FIG. 3.
FIG. 3.

(Color online) As-deposited MOSCAP C-V for different metal gates, with the metal work functions (ΦM) indicated in the legend. The C-V are normalized to the maximum accumulation capacitance. For 100 cy or 9.2 nm Al2O3, the VFB is close to the ideal, suggesting minimal Fermi level pinning.

Image of FIG. 4.
FIG. 4.

(Color online) Pt/Al2O3/n-InGaAs MOSCAP C-V measurements for 50, 75, 100, and 125 cycles of ALD Al2O3 before and after annealing for 30 min under various conditions. These samples correspond to thicknesses of 4.7, 7.0, 9.2, and 12 nm. (a) As-deposited, there is a VFB shift with thickness that indicates the presence of significant oxide charge. (b) Postmetallization annealing in N2 ambient at 350 °C reduces the fixed charge, but also increases the leakage current as indicated by the loss in capacitance for the 50 cy sample. (c) After a post metal anneal in N2 ambient at 400 °C, leakage becomes so severe that the C-V on 50 cy samples were no longer measureable. (d) Annealing in FG at 300 °C aligns the VFB across all thicknesses. (e) FGA at 350 °C appears similar to results at 300 °C. (f) 400 °C FGA created a hump in the depletion region of the 50 cy C-V, and a small additional VFB shift over the 300 and 350 °C annealing. This hump is only present after annealing at 400 °C, indicating that a thermal budget of at least 400 °C for 30 min is needed to break or change the interfacial bonds. It can also be indicative of a weak inversion response where the thickness dependence can be explained by a difference in the amount of potential dropped across the dielectric vs the semiconductor for the different thicknesses. In modeling the MOSCAP as two capacitors in series, for thinner dielectrics, a larger portion of the applied voltage bias will be dropped across the semiconductor, thus making it easier to observe a weak inversion response.

Image of FIG. 5.
FIG. 5.

(Color online) Current-voltage (I-V) leakage measurements of Pt/Al2O3/n-InGaAs MOSCAPs for all annealing conditions. (a) Within a given annealing ambient, the leakage of the 50 cy ALD Al2O3 samples increased with annealing temperature. At a given temperature, annealing in N2 resulted in much higher leakage than in FG. (b) For the 75 cy samples, annealing in FG between 300 and 400 °C did not significantly change the leakage from the as-deposited case. However, annealing in N2 at the same temperatures resulted in up to six orders of magnitude higher leakage.

Image of FIG. 6.
FIG. 6.

(Color online) The midgap DIT is plotted in green as a bar graph, with values corresponding to the left y-axis. The absolute value of the interface sheet charge (QIT) is shown in red on the left y-axis, with the sign of the charge indicated by a “+” or “−” sign. In all cases, the QIT remains negatively charged. The fixed charge density (QF) is shown in blue, with the sign of the charge indicated by a “+” or “−” sign, and values corresponding to the right y-axis. The as-deposited, 300 °C FGA, and 350 °C FGA samples all have positively charged QF, with the rest negatively charged. Each of the different post metallization annealing conditions resulted in DIT, QIT, and QF lower than the as-deposited case, with 400 °C FGA resulting in the lowest. values.

Image of FIG. 7.
FIG. 7.

(Color online) Pt/Al2O3/p-InGaAs MOSCAP 1 MHz C-V measurements for 50, 75, 100, and 125 cycles of ALD Al2O3 after annealing for 30 min under various conditions. These samples correspond to thicknesses of 4.7, 7.0, 9.2, and 12 nm. (a) The as-deposited samples have an oxide thickness dependent VFB shift which indicates the presence of significant oxide charge. (b) Annealing in FG at 300 °C reduces the oxide charges and aligns the VFB across all thicknesses. (c) FGA at 350 °C appears similar to results at 300 °C. (d) Post metallization annealing in N2 ambient at 350 °C also reduces the fixed charge, but has a drop off in capacitance due to a large leakage current comparable with the capacitive displacement current. The 125 cycle sample has an extra shift toward the positive direction, and the reasoning behind this is still currently not understood. The sample was refabricated and annealed, but still yielded the same results.

Image of FIG. 8.
FIG. 8.

(Color online) Current-voltage (I-V) leakage measurements of Pt/Al2O3/p-InGaAs MOSCAPs for all annealing conditions. (a) For the 50 cy ALD Al2O3 samples, annealing at 300 and 350 °C in FG did not significantly change the leakage from the as-deposited case. However, annealing in N2 at 350 °C resulted in several orders of magnitude higher leakage. (b) The 75 cy samples had the same leakage trend, but with a smaller difference between the FG and N2 annealed samples.

Image of FIG. 9.
FIG. 9.

(Color online) The midgap DIT is plotted in green as a bar graph, with values corresponding to the left y-axis. The absolute value of the interface sheet charge (QIT) is shown in red on the left y-axis, with the sign of the charge indicated by a “+” or “−” sign. The as-deposited QIT is negative, but become positively charged after annealing. The fixed charge density (QF) is shown in blue, with the sign of the charge indicated by a “+” or “−” sign, and values corresponding to the right y-axis. QF starts out positive in the as-deposited case, but become negative after annealing. Overall, annealing in FG resulted in DIT, QIT, and QF lower than the as-deposited case, with 350 °C in FGA resulting in the lowest values.

Image of FIG. 10.
FIG. 10.

(Color online) Schematic diagram of the fabricated InGaAs MOSFET with 10 nm ALD Al2O3 gate oxide. Cross-hatched area represents the implanted regions.

Image of FIG. 11.
FIG. 11.

(Color online) Transfer and output characteristics of a surface channel enhancement mode InGaAs nMOSFET with L = 10 µm and W = 320 µm. The as-deposited I-V is indicated by the dotted lines, and the after FGA at 350 °C is indicated by the solid lines. (a) After FGA, the ID-VDS characteristics show a 25% increase in the drive current. Contact and sheet resistances did not change much, so the current increase is believed to be due to the improved dielectric/channel interface. (b) On a log scale, the ID-VGS is the roughly the same before and after FGA annealing, indicating the observed increase in current is not due to a change in the threshold voltage.

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/content/aip/journal/jap/111/4/10.1063/1.3686628
2012-02-28
2014-04-20
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Effect of annealing ambient and temperature on the electrical characteristics of atomic layer deposition Al2O3/In0.53Ga0.47As metal-oxide-semiconductor capacitors and MOSFETs
http://aip.metastore.ingenta.com/content/aip/journal/jap/111/4/10.1063/1.3686628
10.1063/1.3686628
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