banner image
No data available.
Please log in to see this content.
You have no subscription access to this content.
No metrics data to plot.
The attempt to load metrics for this article has failed.
The attempt to plot a graph for these metrics has failed.
Determining the location and cause of unintentional quantum dots in a nanowire
Rent this article for


Image of FIG. 1.
FIG. 1.

(Color online) Cut-away cross section of the device. The silicon nanowire runs from source to drain, the LGs (LGS, LGC and LGD) wrap around the device, and the UG (not labeled) is partially cutaway. The entire device sits on a buried oxide. (b) SEM image of the device before encapsulation by the UG. (c) Comparison of VLGS and VLGD scans taken in device 1 at VUG=2 V, T=4.2 K, and VSD=1 mV. Oscillations due to U-QDs are seen for the LGD.

Image of FIG. 2.
FIG. 2.

(Color online) (a),(b) Current measurement as both UG and LG are scanned for device 1 (a) and device 2 (b) at VSD = 1 mV. Box B contains a peak due to the current through dot B, and box A contains both a more steeply sloped peak due to the current through dot A and two intersections with the peaks due to the current through dot B. Both were measured at the base temperature of a dilution refrigerator. (c) Psuedo-3D view of data from (a), highlighting the much larger current where A and B cross.

Image of FIG. 3.
FIG. 3.

(Color online) (a) Circuit diagram used in this study. The tunnel junctions are labeled as 1 to 5. The horizontal path represents the series path (S-1-A-2-B-3-D) that has the least resistance. The two tunnel junctions below the dots represent the higher resistance parallel paths (S-4-B-3-D and S-1-A-5-D). (b) The results of a simulation of the current through the circuit model (a) using parameters in Tables I and II for device 1.

Image of FIG. 4.
FIG. 4.

(Color online) (a) The top half shows a cross section of device 1, with the Si wire, LGC, LGD, and UG shown to scale along the drain half of the device. The bottom half shows the differential capacitance for device 1from the gates to the wire (z-axis origin is the center of the LGD). The vertical lines in the Si wire and in the capacitance graph show the calculated range of the two U-QDs. (b) A pseudo-3D view of the wire the U-QD locations highlighted and the LG depicted as translucent.


Generic image for table
Table I.

Gate capacitance from LG and UG to dots A and B, as well as the slope of the lines for both devices, as measured from the data in Fig 2. Uncertainties in capacitances and slopes represent the maximum and minimum spacing and slopes that can be fitted given the widths of the peaks.

Generic image for table
Table II.

Complete tunnel junction parameters for both devices as labeled in Figure 3. Parameters were deduced by comparing simulations, as in Fig. 2(c), to measurements, as in Figs. 2(a) and 2(b). Because the full range of parameters that adequately reproduce the measured current was not explored, uncertainties for this table were not evaluated.

Generic image for table
Table III.

Bounds of both dots in both devices. Position is defined using the z-axis defined in Fig. 4(a), in which z = 0 is the center of the LG, the ends of the LG are at ±20 nm, and the UG starts at ±50 nm. Notice the similarities in the locations of dots A and B in the two devices.


Article metrics loading...


Full text loading...

This is a required field
Please enter a valid email address
752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Determining the location and cause of unintentional quantum dots in a nanowire