DLTS results for TiN-gated p-Ge-MIS capacitors without PMA. Open symbols: DLTS measurements were performed by continuous temperature scanning with constant V AP and V R (V AP for each measurement is shown in the figure). Solid circles: DLTS measurements were performed with optimized V AP and V R at each temperature. The inset shows a schematic potential diagram that defines V R, V P, and V AP.
Capture cross-section distribution of interface-traps for Ge-MIS capacitor with SiO2/GeO2 BLP.
D it distributions for TiN-gated p- and n-Ge-MIS capacitors with SiO2/GeO2 BLP. Open and solid circles show the results for the capacitors without and with 450 °C TiN-PMA, respectively.
D it distributions for Al-gated p-Ge-MIS capacitors with SiO2/GeO2 BLP. Solid symbols show the accurate D it results (V AP = 0 V); open symbols mark D it results with influence of slow-traps (V AP/EOT = 1 MV/cm). PMA condition for each sample is shown in the figure.
Channel mobility measured at room temperature for Ge-p-MISFETs fabricated with the same gate process as that for Al-gated Ge-MIS capacitors. The Al-PMA temperature is shown next to the curves.
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