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NiSi2 formation through annealing of nickel and dysprosium stack on Si(100) and impact on effective Schottky barrier height
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10.1063/1.4772710
/content/aip/journal/jap/113/1/10.1063/1.4772710
http://aip.metastore.ingenta.com/content/aip/journal/jap/113/1/10.1063/1.4772710

Figures

Image of FIG. 1.
FIG. 1.

Schematics of (a) control and (b) phase-engineered contact devices, formed from Ni and Ni-on-Dy films, respectively on Si(100). In (b), the Dy-containing layers above NiSi2 or NiSi were removed during wet etch.

Image of FIG. 2.
FIG. 2.

(a) Current-voltage (I-V) curves of contact devices formed using (1) 5nm Ni (control) and (2) Ni (5 nm)/Dy (10 nm) stack (phase-engineered silicide-1). A 450 °C 30 s silicidation anneal was performed. The higher reverse current in the contact device with phase-engineered silicide-1 indicates a lower effective electron Schottky barrier ΦB n, eff . (b) Multi-temperature I-V characteristics of the contact device with phase-engineered silicide-1.

Image of FIG. 3.
FIG. 3.

Richardson plot for the extraction of ΦB n, eff for the contact device with phase-engineered silicide-1 in Fig. 2(a) . A low ΦB n, eff of ∼0.12 eV was extracted.

Image of FIG. 4.
FIG. 4.

(a) I-V curves of the contact devices formed using (3) 15 nm Ni (control) and (4) Ni (15 nm)/Dy (15 nm) stack (phase-engineered silicide-3). A 450 °C 30 s silicidation anneal was performed. (b) Multi-temperature I-V characteristics of the contact device with phase-engineered silicide-3.

Image of FIG. 5.
FIG. 5.

Richardson plot for the extraction of ΦB n, eff for the contact device with phase- engineered silicide-3 in Fig. 4(a) . An ΦB n, eff of ∼0.46 eV was extracted.

Image of FIG. 6.
FIG. 6.

Cumulative distribution plot of Is for control and phase-engineered contact devices.

Image of FIG. 7.
FIG. 7.

(a) High resolution TEM image of the contact device with phase-engineered silicide-1 in Fig. 2(a) . (b) A 3D schematic of a contact device with four pyramids across its plane. (c) A 2D schematic of the cross-sectional interface of the contact device in (b).

Image of FIG. 8.
FIG. 8.

(a) XRD phase analysis of blanket silicide films (without SPM wet clean), formed by annealing (1) Ni (5 nm) and (2) Ni (5 nm)/Dy (10 nm) stack (phase-engineered silicide-1) at 450 °C for 30 s. The high intensity and well-defined spot in the XRD GADDS in (b) indicates that the phase-engineered silicide-1 is epitaxial. The y- and x- axis are chi (χ) and 2-theta (2θ), respectively. (c) Cross-sectional TEM image of the blanket sample with phase-engineered silicide-1 sample (without SPM wet clean).

Image of FIG. 9.
FIG. 9.

(a) XRD phase analysis of blanket silicide samples formed using (a)Ni (5 nm)/Dy (10 nm) and (b) Ni (5 nm)/Dy (15 nm) stack. These samples were annealed in a range of different temperatures, from 250 to 650 °C for 30 s in N2 ambient. NiSi2(111) phase is observed in the range of annealing temperatures from 350 to 650 °C for the two different types of Ni/Dy stacks. The films annealed at 250 °C may have a peak position that is close to the peak position of NiSi2(111) phase, but it is most probably due to Dy2O3(110) phase with 2θ at 29.68°.

Image of FIG. 10.
FIG. 10.

(a) Low magnification and (c) high resolution cross-sectional TEM images of the contact device with phase-engineered silicide-3 in Fig. 4(a) .

Image of FIG. 11.
FIG. 11.

(a) XRD phase analysis of blanket silicide samples (without wet etch), formed by annealing (1) 15 nm Ni and (2) Ni (15 nm)/Dy (15 nm) stack (phase-engineered silicide-3) at 450 °C for 30 s. NiSi, DySi2, and NiSi2 phases are observed in the blanket sample with phase-engineered silicide-3. The GADDS scan in (b) shows four distinct and high-intensity bright spots corresponding to NiSi(112), NiSi(201), NiSi2(111), and DySi2(031) phases. This indicates that the film is highly textured with preferred orientations in the abovementioned lattice planes.

Image of FIG. 12.
FIG. 12.

XRD phase analysis of the blanket sample with phase-engineered silicide-3, formed using Ni (15 nm)/Dy (15 nm) stack. These samples were annealed in a range of different temperatures from 250 to 650 °C for 30 s. (b) SIMS depth profile for the blanket sample with phase-engineered silicide-3 (without SPM wet clean), formed using a 450 °C anneal. Ni- and Dy-rich layers are observed at the surface and a NiSi layer is observed at a depth of ∼22 nm from the surface.

Image of FIG. 13.
FIG. 13.

Schematics showing the solid-state silicidation reaction when annealing (a) Ni(thin)/Dy/Si, and (b) Ni(thick)/Dy/Si film stacks. The growth of the amorphous DySi layer, the nucleation of NiSi2 pyramids and the formation of NiSi phase are depicted.

Image of FIG. 14.
FIG. 14.

(a) Schematic showing the electric field lines acting on a NiSi2 pyramid. (b) Energy band diagram showing the disilicide/silicon interface under reverse bias VR . A triangular barrier is shown above the disilicide's Fermi level Efm . EF , EC , and EV are the Fermi energy level, conduction and valence band edge of the silicon, respectively. Different carrier transport mechanisms can happen across the barrier and they are TE and TFE.

Tables

Generic image for table
Table I.

A summary of the different experimental splits performed in this work. Either the thickness of Dy was changed, while the thickness of Ni was kept constant, or the thickness of Ni was changed, while the thickness of Dy was kept constant.

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/content/aip/journal/jap/113/1/10.1063/1.4772710
2013-01-07
2014-04-18
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: NiSi2 formation through annealing of nickel and dysprosium stack on Si(100) and impact on effective Schottky barrier height
http://aip.metastore.ingenta.com/content/aip/journal/jap/113/1/10.1063/1.4772710
10.1063/1.4772710
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