(a) SEM image of as-synthesized In2Se3 nanowires with diameter 60–200 nm. (b) Top view SEM image of a fabricated In2Se3 nanowire memory cell.
Electrical phase switching behavior of a 60 nm In2Se3 NW memory cell. (a) Resistance change (measured at a read voltage of 1 V) as a function of applied pulse voltages (crystallization: 3.45 V, 100 ; amorphization: 6.25 V, 100 ns). (b) Measured linear I-V characteristics of crystalline and amorphous phases upon 0-1 V DC voltage sweep. (c) Repeated resistive switching of the memory device by applying electrical set (3.45 V, 100 ) and reset pulses (6.25 V, 100 ns), with high switching ratio . (d) Set programming curves of the memory device as a function of programming pulse width.
(a) Set threshold voltage at 100 pulse width as a function of nanowire diameter. (b) Reset threshold voltage at 100 ns pulse width as a function of nanowire diameter.
In2Se3 nanowire size-dependent thermal resistance (blue triangle) and power consumption (red circle). (a) Programming power as low as 11.9 pW is sufficient for crystallization operation in a 60 nm In2Se3 nanowire memory cell with K/W amorphous thermal resistance; (b) while it is 0.673 mW for amorphization operation with K/W crystalline thermal resistance.
Comparison of In2Se3 nanowire device to GST, 14,31 GT, 13,22 GS, 18,32 Bi2Te3 (Ref. 33 ) nanowire, and In2Se3 thin film devices. 6 (a) In amorphous phase, In2Se3 nanowire has the highest thermal resistance compare to the others, requiring for the lowest crystallization power. (b) In crystalline phase, In2Se3 nanowire has relatively higher thermal resistance than GST, Bi2Te3 nanowire, and In2Se3 thin film, requiring for lower amorphization power.
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