(a) Composition dependence of Ge1− x Sn x band-gap at Γ-valley (EG, Γ) and L-valley (EG , L ) for Ge1− x Sn x alloy. Symbols are experimental data and the lines are obtained from EPM calculations. For Ge1− x Sn x alloys with Sn composition x below 0.11, the conduction band minimum is at L-point, and the alloy is an indirect band-gap material. For x higher than 0.11, Ge1− x Sn x is a direct band-gap material since the conduction band minimum is located at Γ-point. (b) Full band E-k dispersion for Ge and Ge0.89Sn0.11. As Sn composition increases, Ge1− x Sn x alloy transits from indirect to direct band-gap at around x = 0.11. The differences in band-gaps at Γ-point and L-point are highlighted as ΔEG, Γ and ΔEG , L .
(a) The DOS electron effective mass in the L-valley ( ) is larger than the one in the Γ-valley ( ) for Ge1− x Sn x alloys with various x. (b) The intrinsic carrier concentration and electron occupation ratio versus Sn composition. For Ge1− x Sn x with x > 0.11, although the conduction band minimum at the Γ-valley is lower than the one at the L-valley, there are more electrons in L-valley than Γ-valley.
Tunneling reduced masses for Γ-Γ BTBT ( ) and Γ-L BTBT ( ) decrease as Sn composition increases.
(a) Schematic showing device structure of DG Ge1− x Sn x TFET. (b) Band diagram near surface along X-axis of Ge0.95Sn0.05 TFET at VGS = VDS = 0.3 V. Since EC , L is lower than EC, Γ, the tunneling distance from EV at the source side to EC , L in the channel dind (denoted by gray arrow) is shorter than that from EV at the source side to EC, Γ in the channel ddir (denoted by black arrow). (c) Band diagram near surface along X-axis of Ge0.86Sn0.14 TFET at VGS = VDS = 0.3 V. Since EC, Γ is lower than EC , L , ddir is shorter than dind .
Spatial distributions of (a) , (b) , and (c) for Ge0.95Sn0.05 TFET at VGS = VDS = 0.3 V. As the double-gate device is symmetrical about a mirror line at Y = 12.5 nm, only the upper half body (0 < Y < 12.5 nm) is shown.
Spatial distributions of (a) , (b) , and (c) for Ge0.86Sn0.14 TFET at VGS = VDS = 0.3 V. As the double-gate device is symmetrical about a mirror line at Y = 12.5 nm, only the upper half body (0 < Y < 12.5 nm) is shown. The magnitude of for Ge0.86Sn0.14 TFET is larger than that for Ge0.95Sn0.05 TFET shown in Fig. 5(c) .
(a) Simulated IDS -VGS for Ge0.95Sn0.05 TFET. Vind is lower than Vdir since EG , L is smaller than EG, Γ. As VGS is larger than Vind , BTBT from EV at source side to EC , L occurs. However, at VGS > Vdir , BTBT from EV to EC, Γ dominates the tunneling current. (b) Simulated IDS -VGS for Ge0.86Sn0.14 TFET. Vdir is lower than Vind since EG, Γ is smaller than EG , L . As VGS > Vdir , BTBT occurs from EV at source side to EC, Γ and dominates the drive current once VGS reaches Vdir .
(a) A set of IDS -VGS curves of Ge1− x Sn x TFETs with x ranging from 0 to 0.2. (b) Point S versus IDS for Ge1− x Sn x TFETs with x from 0 to 0.2. For Ge0.8Sn0.2 TFET, sub-60 mV/decade S is achieved at a high current level of ∼8 μA/μm.
IOFF versus ION of Ge1− x Sn x TFETs with x = 0.00, 0.05, 0.08, 0.11, and 0.17 at a supply voltage of 0.3 V. For a given IOFF , VOF F is the value of VGS when IDS equals to the IOFF , ION is extracted at VGS – VOFF = VDS = 0.3 V. IOFF is varied from 10−9 to 10−2 mA/μm. For a fixed IOFF , ION of Ge1− x Sn x TFET is higher than that of Ge TFET.
Summary of material parameters used in TCAD simulation.
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