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Characterization and modeling of screen-printed metal insulator semiconductor tunnel junctions for integrated bypass functionality in crystalline silicon solar cells
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Image of FIG. 1.
FIG. 1.

Schematic cross sections of conventional H-pattern solar cell (a) and more advanced high-performance metal wrap through (HIP-MWT) solar cell (b). The dashed rectangles indicate the possible integration of a bypass junction based on a screen-printed MIS contact. A third possibility is a HIP-MWT structure (right) without an intermediate dielectric between rear n-type contact and p-type base.

Image of FIG. 2.
FIG. 2.

Schematic cross section of the test structure for the investigation of silver-insulator-silicon junctions with different dielectrics. Wafer thickness is ≈175 m, edge length is 125 mm, total silver contact area is 2 × 1.5 × 123 mm ≈ 3.7 cm.

Image of FIG. 3.
FIG. 3.

Current-voltage characteristics of screen-printed silver contacts on p-type silicon coated with different dielectrics. Data recorded without illumination. Each curve shows the mean values of at least two samples. The specified bias denotes the voltage of the semiconductor against the silver contact, i.e., the semiconductor is the positive pole for  > 0. The current density refers to the area covered by the silver paste (3.7 cm). The reason for the local maximum of the current for group 2 at ≈2 V is not clear to date.

Image of FIG. 4.
FIG. 4.

Scanning electron micrographs of a screen-printed MIS contact (cross section polish) with a nominal layer thickness of 100 nm for both silicon oxide and silicon nitride. (a) overview, (b) typical structure with dielectric on top of silicon covered by a glass layer and silver particles from the silver paste. (c) and (d) areas where the dielectric locally diminishes.

Image of FIG. 5.
FIG. 5.

Schematic of the energy bands of a silver/SiO/silicon interface for (a) flat band and (b) inversion conditions. Parameters and denote the Fermi levels of metal and semiconductor, while , , and represent vacuum level, conductance band, and valence band, respectively. The relevant tunnel path for  < 0 V is electron tunneling from the conductance band (ECB) with the corresponding barrier height .

Image of FIG. 6.
FIG. 6.

Equivalent circuit for a MIS tunnel junction consisting of series and parallel resistance ( and , respectively), capacitor and tunnel junction.

Image of FIG. 7.
FIG. 7.

Measured characteristics (symbols) of the test structures (see Table I ) and simulated data (lines) from Eq. (3) . Parameter denotes an ohmic component whereas ECB, ECB, and ECB denote the tunneling current through different barrier configurations (see Table II ). Free parameters are , , and ; they are adjusted using a logarithmically weighted least squares fit.

Image of FIG. 8.
FIG. 8.

Reverse (a) and forward (b) current-voltage characteristics of a sample with 100 nm silicon nitride dielectric after repeated measurements. The solid line represents a fit of the ECB tunnel model (Eq. (3) ) to the initial measurement.


Generic image for table
Table I.

Overview over the investigated dielectric layer systems and theirtarget thickness. PECVD denotes plasma-enhanced chemical vapor deposition.

Generic image for table
Table II.

Parameters used for the model calculations (lines) in Fig. 7 .

Generic image for table
Table III.

Impact of an integrated bypass junction with an area coverage of on the conversion efficiency (Δ ) and reverse bias heat dissipation for a current of 10 A and a cell area of 240 cm. The illuminated forward characteristic of an HIP-MWT solar cell with a conversion efficiency of  20.2% and the data from Fig. 3 are used for the calculation of Δ . For group 5, the current does not reach 10 A at  = −15 V but only 4.25 A, thus the heat dissipation is given in braces.


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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Characterization and modeling of screen-printed metal insulator semiconductor tunnel junctions for integrated bypass functionality in crystalline silicon solar cells