(a) Fabrication process flow. (b) Representative SEM images of a device after fabrication. The magnified image depicts the elevated InAs QW floor, which was designed to isolate the InAs QW from the GaSb substrate.
(a) Device schematic showing the configuration of the applied voltages. (b) The measured current as a function of the tunnel diode voltage (V TD) when the gate bias V G is swept from −0.4 V to 1.2 V in 0.4 V steps. (c) The measured current as a function of the gate bias at a fixed V TD of −0.45 V. The device active area is 0.375 × 24 μm2.
(a) Qualitative band alignment of the 2D/3D tunnel diode. (b) The measured peak positions (T1, T2) and separations (T2-T1) as a function of V G.
Measured (red) and simulated (black) I-V curves of a gated diode at V G = 0 V.
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