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Design, fabrication, and analysis of p-channel arsenide/antimonide hetero-junction tunnel transistors
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10.1063/1.4862042
/content/aip/journal/jap/115/4/10.1063/1.4862042
http://aip.metastore.ingenta.com/content/aip/journal/jap/115/4/10.1063/1.4862042

Figures

Image of FIG. 1.
FIG. 1.

Schematic illustration of the high-κ/GaSb interface states.

Image of FIG. 2.
FIG. 2.

(a) Schematic of ultra-thin body pTFET simulated. (b) Transfer characteristics of InAs/GaSb and InGaAs/GaAsSb pTFET as a function of the source doping. (c) I as a function of N in InAs/GaSb pTFET.

Image of FIG. 3.
FIG. 3.

(a) Schematic of MBE grown InAs-GaSb hetJ layer structure (b) Schematic of MBE grown GaSb homJ layer structure. (c) False colored cross section TEM of the fabricated InAs-GaSb hetJ. (d) False colored cross section TEM of the fabricated GaSb homJ pTFET.

Image of FIG. 4.
FIG. 4.

(a) C–V characteristics of AlO/HfO deposited on p-type GaSb in the frequency range of 75 KHz to 1 MHz measured at 300 K as a function of deposition temperature. (b) C–V characteristics of AlO/HfO deposited 110 °C and measured at T = 300 K and T = 150 K.

Image of FIG. 5.
FIG. 5.

(a) Measured and modeled CV characteristics at T = 300 K as a function of frequency. (b) Measured and modeled GV characteristics at T = 300 K as a function of frequency. (c) Extracted D as a function of gate voltage taking into account traps distributed into the oxide. (d) Extracted trap response time as a function of gate voltage taking into account traps distributed into the oxide. (e) D as a function of energy location in the bandgap for T = 110 °C and 200 °C.

Image of FIG. 6.
FIG. 6.

(a) and (b) I–V characteristics of hetJ and homJ pTFETs at T = 300 K and 150 K. (c) SS as a function of drain current at T = 150 K showing lower SS in hetJ compared to homJ pTFET. (d) hetJ pTFET exhibits lower DIBT compared to homJ pTFET at I = 1 nA/m, T = 150 K.

Image of FIG. 7.
FIG. 7.

(a) I–V characteristics of hetJ for varying gate voltage pulse widths. (b) SS of hetJ pTFET as a function of drain current for varying gate voltage pulse widths. (c) I–V characteristics of homJ pTFET show negligible change in I with 10 s gate voltage pulsing compared to DC bias conditions. (d) SS of homJ pTFET shows negligible change in I with 10 s gate voltage pulsing compared to DC bias conditions.

Image of FIG. 8.
FIG. 8.

(a) and (b) Symmetric and asymmetric RSM of InAs/GaSb structure showing the presence of GaAsSb at the hetero-junction. (c) Cross-section TEM of the InAs/GaSb structure confirming the presence of an amorphous layer of GaAsSb at the hetero-junction.

Tables

Generic image for table
Table I.

Benchmarking of I against experimentally demonstrated pTFET till date.

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/content/aip/journal/jap/115/4/10.1063/1.4862042
2014-01-23
2014-04-19
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Design, fabrication, and analysis of p-channel arsenide/antimonide hetero-junction tunnel transistors
http://aip.metastore.ingenta.com/content/aip/journal/jap/115/4/10.1063/1.4862042
10.1063/1.4862042
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