Index of content:
Volume 94, Issue 10, 15 November 2003
- DEVICE PHYSICS (PACS 85)
94(2003); http://dx.doi.org/10.1063/1.1616643View Description Hide Description
A nonuniform, one-dimensional tunnel junction array that is designed to promote phase-locking to an ac pump signal is proposed and theoretically investigated for possible information processing applications. The tunnel resistances of the junctions in one part of the array are tailored to provide phase restoration for electrons tunneling in the array, while the tunnel resistances in the other part of the array are designed to provide a time delay with minimal jitter. It is shown that phase-locking of the tunneling is possible at the fundamental and at the one-half subharmonic of the pump frequency. While the required parameter ranges and the necessary degree of control of this design are not practical for tunneling phase logic based on conventional tunnel junction technologies, the proposed design could potentially be realized in a molecular system.
94(2003); http://dx.doi.org/10.1063/1.1620683View Description Hide Description
The open-circuit voltage of bulk-heterojunction solar cells based on [6,6]-phenyl -butyric acid methyl ester (PCBM) as electron acceptor and poly[2-methoxy-5(3′,7′-dimethyloctyloxy)-p-phenylene vinylene] as an electron donor has been investigated. In contrast to the present understanding, it is now demonstrated that for non-ohmic contacts the experimental is determined by the work function difference of the electrodes. A total variation of more than 0.5 V of the was observed by variation of the negative electrode(cathode)work function. For ohmic contacts the is governed by the LUMO and HOMO levels of the acceptor and donor, respectively, which pin the Fermi levels of the cathode and anode. The band bending created by accumulated charges at an ohmic contact produce a considerable loss in of 0.2 V at room temperature. The experimentally observed voltage loss in of 0.38 V due to the presence of ohmic contacts at both interfaces strongly limits the maximum open-circuit voltage of solar cells.
Impact of virtual substrate growth on high performance strained Si/SiGe double quantum well metal-oxide-semiconductor field-effect transistors94(2003); http://dx.doi.org/10.1063/1.1619197View Description Hide Description
Strained Si/SiGe n-channel metal-oxide-semiconductorfield-effect transistors(MOSFETs) have been fabricated using a dual quantum well structure. The heterostructure is designed for maximum performance from both n- and p-channel devices using a single virtual substrate. An optimized thermal budget has been used for device fabrication, which was possible due to the strain-compensated layer structure providing increased material robustness to strain relaxation. Epitaxialgrowth has been carried out by low-pressure chemical vapor deposition (LPCVD) at two different temperatures. Strained Si MOSFETsfabricated on virtual substrates grown at high temperature exhibited drain current enhancements three times as large as those demonstrated by strained Si MOSFETsfabricated on materialgrown at low temperature, compared with control Si devices. Detailed material analysis suggests that the higher degree of surface roughness and higher defect density of the low temperature LPCVD material limits the performance enhancements achievable due to the increased carrier scattering in these devices. Nevertheless, the results demonstrate that by incorporating strain-compensated Si/SiGe layers into conventional Si MOSFETs, even degraded SiGe material can offer performance advantages over bulk Si devices. However, high temperature materialgrowth is required to achieve both maximum performance gains and the same degree of uniformity as that achieved from bulk Si technologies.