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Andreev reflection and enhanced subgap conductance in junctions
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10.1063/1.1783612
/content/aip/journal/jap/96/6/10.1063/1.1783612
http://aip.metastore.ingenta.com/content/aip/journal/jap/96/6/10.1063/1.1783612
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

Schematic of the sample layout. The two-dimensional electron gas is located in the strained layer. The semiconductor mesa is defined by reactive ion etching. The electrodes make contact at the sidewalls of the mesa.

Image of FIG. 2.
FIG. 2.

Differential resistance vs bias voltage for a interface at different temperatures.

Image of FIG. 3.
FIG. 3.

Differential resistance as a function of the bias voltage for a interface. The measurements are performed at several temperatures in the range.

Image of FIG. 4.
FIG. 4.

Normalized differential resistance vs bias current of interface for several magnetic fields. .

Image of FIG. 5.
FIG. 5.

Calculated normalized differential resistance as a function of the bias voltage according to the model.1 Parameters of the model1 are: ; ; and .

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/content/aip/journal/jap/96/6/10.1063/1.1783612
2004-09-02
2014-04-17
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Andreev reflection and enhanced subgap conductance in NbN∕Au∕InGaAs‐InP junctions
http://aip.metastore.ingenta.com/content/aip/journal/jap/96/6/10.1063/1.1783612
10.1063/1.1783612
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