Index of content:
Volume 96, Issue 6, 15 September 2004
- DEVICE PHYSICS (PACS 85)
Probing intrinsic transport properties of single metal nanowires: Direct-write contact formation using a focused ion beam96(2004); http://dx.doi.org/10.1063/1.1779972View Description Hide Description
The transport characteristics of -diameter platinumnanowires (NWs), fabricated using a pore-templated electrodeposition process and individually contacted using a focused ion beam(FIB) method, are reported. This approach yields nanowire devices with low contact resistances and linear current–voltage characteristics for current densities up to . The intrinsic nanowireresistivity indicates significant contributions from surface- and grain-boundary scattering mechanisms. Fits to the temperature dependence of the intrinsic NW resistance confirm that grain-boundary scattering dominates surface scattering (by more than a factor of 2) at all temperatures. Our results demonstrate that FIB presents a rapid and flexible method for the formation of low-resistance ohmic contacts to individual metalnanowires, allowing intrinsic nanowire transport properties to be probed.
96(2004); http://dx.doi.org/10.1063/1.1775296View Description Hide Description
in the beam doses from are implanted into single crystals at room temperature. After annealing for in air ambient, dark mode measurement is done by the prism-coupling technique. Waveguides from both raised extraordinary index layer and barrier-confined are formed by low and high beam dose implantation, respectively. In the samples implanted by mediate beam doses, a phenomenon of “missing mode” is observed. The experimental results are analyzed and compared with the simulated results from a theoretical model, which is based on the assumption that the change of index induced by implantation is mainly governed by degradation of polarization and reduction of material density. With a fiber probe, the waveguide loss from single transverse magnetic mode is measured, which is about .
Engineering chemically abrupt high- metal oxide∕silicon interfaces using an oxygen-gettering metal overlayer96(2004); http://dx.doi.org/10.1063/1.1776636View Description Hide Description
High-metal oxide gate dielectrics may be required to extend Moore’s law of semiconductor device density scaling into the future. However, growth of a thin -containing interface layer is almost unavoidable during the deposition of metal oxide films onto substrates. This limits the scaling benefits of incorporating high-dielectrics in future transistors. A promising approach, in which oxygen-gettering metal overlayers are used to engineer the thickness of the -based interface layer between metal oxide and substrate afterdeposition of the metal oxide layer, is reported. Using a overlayer with high solubility for oxygen on or dielectrics, the effective removal of the low- interface layer at has been confirmed by electron microscopy and spectroscopy techniques. Significant enhancement of the gate capacitance density, while retaining low leakage current densities, has also been demonstrated for these interface-engineered high- gate stacks.
Comparison of oxide breakdown progression in ultra-thin oxide silicon-on-insulator and bulk metal-oxide-semiconductor field effect transistors96(2004); http://dx.doi.org/10.1063/1.1776640View Description Hide Description
Enhanced oxide breakdown progression in ultra-thin oxide silicon-on-insulator p-type metal-oxide-semiconductorfield-effect transistors is observed, as compared to bulk devices. The enhanced progression is attributed to the increase of hole stress current resulting from breakdown induced channel carrier heating in a floating-body configuration. Numerical analysis of hole tunneling current and hot carrier luminescence measurement are performed to support our proposed theory. This phenomenon is particularly significant to the reliability of devices with ultra-thin oxides and low operation gate voltage.