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Scanning magnetron-sputtered TiN coating as diffusion barrier for silicon devices
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10.1063/1.1896433
/content/aip/journal/jap/97/10/10.1063/1.1896433
http://aip.metastore.ingenta.com/content/aip/journal/jap/97/10/10.1063/1.1896433
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

XRD patterns of TiN films deposited at different substrate bias voltages.

Image of FIG. 2.
FIG. 2.

Variation of stress and grain size of TiN films with substrate bias voltage.

Image of FIG. 3.
FIG. 3.

Variation of resistivity of TiN films with substrate bias voltage.

Image of FIG. 4.
FIG. 4.

Variation of resistivity of TiN films with annealing temperature.

Image of FIG. 5.
FIG. 5.

Surface SEM photographs of TiN films deposited at bias and at (a) room temperature. (b) Room temperature deposited film annealed at .

Image of FIG. 6.
FIG. 6.

Variation of resistivity of structure with annealing temperature.

Image of FIG. 7.
FIG. 7.

XRD results of structures at different annealing temperatures.

Image of FIG. 8.
FIG. 8.

Surface SEM photographs of , samples annealed at (a) RT, (b) , and (c) .

Image of FIG. 9.
FIG. 9.

Cross-sectional SEM photographs of , samples annealed at (a) 650 and (b) .

Image of FIG. 10.
FIG. 10.

Surface SEM photographs of , samples annealed at (a) 800 and (b) .

Image of FIG. 11.
FIG. 11.

EDAX results of the structure annealed at (a) 750, (b) 800, and (c) .

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/content/aip/journal/jap/97/10/10.1063/1.1896433
2005-04-28
2014-04-17
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Scanning magnetron-sputtered TiN coating as diffusion barrier for silicon devices
http://aip.metastore.ingenta.com/content/aip/journal/jap/97/10/10.1063/1.1896433
10.1063/1.1896433
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