A schematic overview of the TDRC method. The top, middle, and bottom graphs show temperature, gate bias voltage, and gate current as functions of time. The curve on the left is typical for an -type MOS capacitor and the arrows show the charging and discharging voltages used during the measurement. The band diagrams at the bottom show the MOS structure in accumulation (left) and depletion (right). The depletion region and the thickness of the oxide are not drawn to scale.
(a) measurements on -type 4H-SiC MOS capacitors and (b) interface state density extracted from the data in Fig. 2(a).
Thermal dielectric relaxation current spectra of (a) the dry oxidized sample and the (b) dry oxidized sample that received reoxidation. In (a) the varies between 2 and in steps, and in (b) varies between 2 and in steps. Each curve is represented by a point in Fig. 4. The pad radius is .
Charge trapped in interface states as a function of the electric field across the oxide for dry oxide and reoxidized dry oxide samples. The data is extracted from the TDRC curves in Fig. 3. The broken line marks the number density of electrons accumulated at the interface in the capacitors during charging.
(a) TDRC spectra of an -type capacitor using . The charging voltages are 4, 6, 8, 18, and . (b) TDRC spectra of an -type capacitor using . The charging voltages are 15, 16, and . The thickness of the nitride is . (c) TDRC spectra of an -type Al∕TEOS∕4H-SiC capacitor using . The charging voltages are 20, 40, and . (d) TDRC spectra of an -type Al∕TEOS∕4H-SiC capacitor using . The charging voltages are 20, 40, and . The thickness of the TEOS is . In all the cases, the pad radius is .
HREM images of the layer system on a 4H-SiC wafer (below are enlargements of the indicated areas).
layer system on a 4H-SiC wafer; (a) EEL spectra No. 1 to 25 along the line indicated in (b); intensities are in arbitrary units and; (c) quantification of the spectra (in at. %).
Electron energy-loss spectra of the carbon- energy edge recorded at different places of the interface. The lowest spectrum amounts to the SiC standard.
EFTEM of a interface: (a) unfiltered TEM image, (b) silicon map, (c) intensity profile as indicated in (b), (d) carbon map, (e) intensity profile as indicated in (d), and (f) carbon∕silicon ratio from (c) and (e). Profiles (c) and (e) are in arbitrary units.
HREM images of the layer system on a 4H-SiC wafer (below are enlargements of the indicated areas, encircled is graphitic carbon).
ELNES of edges near the interface.
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