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A quantitative analytical model for static dipolar disorder broadening of the density of states at organic heterointerfaces
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View: Figures


Image of FIG. 1.
FIG. 1.

(a) Schematic illustrating the interaction of the charge in the semiconductor (SC) with a dipole moment in the gate dielectric (GD). The charge in the semiconductor is located at a distance away from the interface. (b) Calculated DOS broadening due to static dipolar disorder in the dielectric with increasing distance into the semiconductor. Each line corresponds to a step of into the semiconductor from up to and has been calculated using Eq. (4). The dashed line indicates the unbroadened Gaussian DOS with a characteristic width of . The dots are a result of numerical simulation including either just the nearest dipole (, blue squares) or the nearest ten dipoles (, red circles).

Image of FIG. 2.
FIG. 2.

Simulated (lines) vs experimentally derived mobility (points) for three dielectrics as function of interface electric field: (a) PS, (b) PVP, and (c) PMMA. Also shown in (b) is the normalized mobility of rubrene single crystal devices with a PVP dielectric (circles). The rubrene data are taken from Ref. 20. The data for PS are restricted to values less than due to the limited breakdown voltage of these devices. The solid lines show the theoretical dipolar disorder simulation described in the text, while the dashed lines show the results when the effects of Fröhlich polarons are also included into the dipolar disorder simulations (see discussion below). PS exhibits a very weak Fröhlich polaron effect because the high and low frequency permitivities are similar; the dashed line has been omitted from (a) for clarity. The experimentally determined gate voltage dependent mobility is plotted as a function of the electric field in the semiconductor perpendicular to the heterointerface to allow comparison between devices manufactured with different capacitances. The mobilities are normalized by the mobility when the interface electric field is . This value of mobility at value is shown in (d) for the different gate dielectrics. The values are averaged over at least ten devices. The lines show the result of the simulation with the same meaning of the solid and dashed lines as in (a)–(c).

Image of FIG. 3.
FIG. 3.

Mobility variation with gate voltage for a PTAA FET made with a PVP dielectric, for a temperature range between 300 and in steps of . The mobility at each temperature has been normalized by the mobility at .


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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: A quantitative analytical model for static dipolar disorder broadening of the density of states at organic heterointerfaces