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Discrete transistor measuring and matching using a solid core oven
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10.1063/1.4793772
/content/aip/journal/rsi/84/3/10.1063/1.4793772
http://aip.metastore.ingenta.com/content/aip/journal/rsi/84/3/10.1063/1.4793772

Figures

Image of FIG. 1.
FIG. 1.

Simulation results of errors caused by mismatched transistor properties in a current mirror with 1 mA current. Due to differences in the current gain and in VBE, currents being traveling through transistors are not equal.

Image of FIG. 2.
FIG. 2.

Simulated effect of transistor differences in a differential amplifier.

Image of FIG. 3.
FIG. 3.

Structural 3D-model of the solid core oven.

Image of FIG. 4.
FIG. 4.

Solid core transistor oven.

Image of FIG. 5.
FIG. 5.

Block diagram of the measurement system.

Image of FIG. 6.
FIG. 6.

Measurement circuit of NPN-transistors.

Image of FIG. 7.
FIG. 7.

32 places for transistors on a carriage holder.

Image of FIG. 8.
FIG. 8.

Correction factor for each measurement channel.

Image of FIG. 9.
FIG. 9.

Calibration effect in base-to-emitter voltage demonstrated with two transistors.

Image of FIG. 10.
FIG. 10.

VBE versus temperature behavior of four arbitrarily selected transistors.

Image of FIG. 11.
FIG. 11.

Theoretically calculated (continuous line) and measured (dashed line) thermal dependence of transistors’ base-to-emitter voltage.

Image of FIG. 12.
FIG. 12.

Effect of temperature on transistors’ VBE (upper figure) and current gain (lower figure). Both signals are the averages of 32 measured transistors.

Image of FIG. 13.
FIG. 13.

Distribution of base to emitter voltage in transistor series purchased from different suppliers.

Image of FIG. 14.
FIG. 14.

Supplier Y current gain distribution.

Image of FIG. 15.
FIG. 15.

Dot dispersions of current gain and base-to-emitter voltage for NPN- and PNP- type transistors from one supplier.

Image of FIG. 16.
FIG. 16.

Dot dispersion of the first 50 transistors from NPN and PNP transistor batches.

Image of FIG. 17.
FIG. 17.

Example of the use of complementary transistor series Q1, 2, 3, and 4 presented in Table II in a symmetrical push-pull zero-feedback amplifier. 2

Tables

Generic image for table
Table I.

Example of bipolar transistor measurement batches.

Generic image for table
Table II.

Example of four matched complementary transistors.

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/content/aip/journal/rsi/84/3/10.1063/1.4793772
2013-03-12
2014-04-20
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Discrete transistor measuring and matching using a solid core oven
http://aip.metastore.ingenta.com/content/aip/journal/rsi/84/3/10.1063/1.4793772
10.1063/1.4793772
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