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A recursive least squares-based demodulator for electrical tomography
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10.1063/1.4799971
/content/aip/journal/rsi/84/4/10.1063/1.4799971
http://aip.metastore.ingenta.com/content/aip/journal/rsi/84/4/10.1063/1.4799971
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

Flowchart of ROM-based implementation of RLS-based demodulator in FPGA.

Image of FIG. 2.
FIG. 2.

Comparison of demodulation results between floating-point calculation and fixed-point calculations with different precisions.

Image of FIG. 3.
FIG. 3.

Variation of standard deviation of the demodulated amplitudes with sampling time under different sampling rates.

Image of FIG. 4.
FIG. 4.

Variation of relative standard deviation of the demodulated amplitudes with number of recursion times under different resolutions of ADC.

Image of FIG. 5.
FIG. 5.

Schematic diagram of FPGA-based capacitance measurement circuit for ECT.

Image of FIG. 6.
FIG. 6.

Variation of standard deviation of demodulated capacitance values with number of recursion times.

Image of FIG. 7.
FIG. 7.

Variation of SNR with number of recursion times.

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/content/aip/journal/rsi/84/4/10.1063/1.4799971
2013-04-10
2014-04-20
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: A recursive least squares-based demodulator for electrical tomography
http://aip.metastore.ingenta.com/content/aip/journal/rsi/84/4/10.1063/1.4799971
10.1063/1.4799971
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