- Conference date: 15-18 March 2005
- Location: Richardson, Texas (USA)
We demonstrate the use of electrical methods for evaluating the thermomechanical fatigue properties of patterned aluminum and copper interconnects on silicon‐based substrates. Through a careful selection of alternating current frequency and current density, we used controlled Joule heating to simulate in an accelerated manner the type of low frequency thermal stress cycles that an interconnect structure may undergo. Sources of such stressing may include power cycling, energy‐saving modes, or application‐specific fluctuations, as opposed to stressing at chip operating frequencies. The thermal stresses are caused by differences in thermal expansion properties between the metal and constraining substrate or passivation. Test conditions included a frequency of 100 Hz and current density of 11 – 16 MA/cm2, which led to a cyclic temperature amplitude of approximately 100 K, and corresponding cyclic stress amplitude in excess of 100 MPa for Al‐1Si and Cu lines on oxidized silicon. The failure mechanism differs from that observed in direct current electromigration studies, and involves formation of localized plasticity, which causes topography changes on the less‐constrained surfaces of the interconnect. Open circuit eventually took place by melting at a region of severely reduced cross‐sectional area. In these studies, both Al‐1Si and Cu responded to power cycling by deforming in a manner that was highly dependent upon variations in grain size and orientation. Isolated patches of damage appeared early within the confines of individual grains or clusters of grains, as determined by automated electron backscatter diffraction. With increased cycling or with increased current density, the extent of damage became more severe and widespread. We discuss the utility of electrical methods for accelerated testing of mechanical reliability.
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