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Gate arrays for parallel computing in the CP‐LEAR calorimeter trigger testability, simulation and validation
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10.1063/1.39520
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/content/aip/proceeding/aipcp/10.1063/1.39520
1990-08-01
2014-09-21
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229c8a00d8fe88cf152414eb5d9cd803 conferences.conference_paperzxybnytfddd
Scitation: Gate arrays for parallel computing in the CP‐LEAR calorimeter trigger testability, simulation and validation
http://aip.metastore.ingenta.com/content/aip/proceeding/aipcp/10.1063/1.39520
10.1063/1.39520
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