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Development of plasma-based implant for silicon devices
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View: Figures


Image of FIG. 1.
FIG. 1.

Plasma implant schematic illustration showing a simulation of ion trajectories (left side) and electric potential contours for the plasma sheath with a wafer bias of .

Image of FIG. 2.
FIG. 2.

Wafer bias (negative) and plasma density timing chart for (a) continuous plasma PIII, (b) long pulse plasma PIII, and (c) pulse ignited glow discharge plasma.

Image of FIG. 3.
FIG. 3.

Ion implantation device from Schockley’s U.S. Patent No. 2 787 564.

Image of FIG. 4.
FIG. 4.

Hans Strack’s plasma immersion system from Ref. 12.

Image of FIG. 5.
FIG. 5.

Plasma immersion system from the Berkeley papers of Refs. 21–25.

Image of FIG. 6.
FIG. 6.

As-implanted SIMS profiles for plasma implants at several process pressures on patterned photoresist wafers and a reference amorphized wafer (PAI).

Image of FIG. 7.
FIG. 7.

As-implanted SIMS profiles across a single wafer showing consistent plasma implant depth and channeling for a implant, and a reference amorphized wafer (PAI).

Image of FIG. 8.
FIG. 8.

Map of application areas as a function of dose and energy. The focus of plasma implantation has been to address high current applications such as gate doping and source drain extension implants (SDE).

Image of FIG. 9.
FIG. 9.

Cross section of a transistor fabricated by plasma implant without a sacrificial offset spacer.

Image of FIG. 10.
FIG. 10.

SIMS dose integration of PLAD and beamline implants vs energy, all implants with a dose of 3E15, for as-implanted (AI) and spike annealed (, ) wafers.


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Scitation: Development of plasma-based implant for silicon devices