(a) Die photo of the test CMOS substrate, showing the available sites for tube transfer for hybrid circuit fabrication. (b) Schematic of the CNFET fabricated on the CMOS substrate. The FET is part of the chip commercially fabricated in technology.
(a) SEM micrograph of grown two-nanotube bundle traversing the slit substrate. (b) Rayleigh scattering spectra for two-nanotube bundle used for fabrication of the CNFET -FET device. Inner peaks correspond to a (15,14) nanotube. Outer peaks correspond to (24,2) nanotube. Both tubes have diameter. (Based on analysis of the Rayleigh spectra as described in Ref. 9).
(a) SEM micrograph of transferred nanotube before device fabrication. (b) Fabricated CNFET -FET device on the CMOS substrate.
(a) Measured characteristics of the CNFET -FET integrated into the hybrid inverter. No saturation is evident in this plot as it is taken over a restricted range of . (b) The curve of the same CNFET.
(a) Voltage transfer characteristic of hybrid CNFET/CMOS inverter operating at . (b) Supply current for the inverter as a function of .
Article metrics loading...
Full text loading...