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Fabrication of half-pitch silicon lines by single-exposure self-aligned spatial-frequency doubling
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10.1116/1.2801889
/content/avs/journal/jvstb/25/6/10.1116/1.2801889
http://aip.metastore.ingenta.com/content/avs/journal/jvstb/25/6/10.1116/1.2801889
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

Schematic representation of the graph-paper lithography process. A lithographic pattern is written at twice the final pitch; a self-aligned spatial-frequency doubling technique is used to produce a large-area pattern at the desired small pitch, and a lithography tool with the same resolution as the initial grating is used to personalize the grating to produce the final lithographic pattern.

Image of FIG. 2.
FIG. 2.

wide photoresist lines on an pitch using water immersion interferometric lithography.

Image of FIG. 3.
FIG. 3.

Schematic of the self-aligned spatial-frequency doubling process sequence using KOH etching.

Image of FIG. 4.
FIG. 4.

SEM of a pattern produced in silicon using the self-aligned spatial-frequency doubling process.

Image of FIG. 5.
FIG. 5.

SEM of a region near a defect in the lithographic pattern. Note the smooth sidewalls of the larger KOH-etched V grooves along with a comparable roughness of the top layers for all three observed V-groove dimensions.

Image of FIG. 6.
FIG. 6.

Schematic process flow for an alternative, manufacturing-friendly, self-aligned frequency-doubling scheme similar to traditional gate sidewall passivation processes.

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/content/avs/journal/jvstb/25/6/10.1116/1.2801889
2007-12-07
2014-04-24
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Fabrication of 22nm half-pitch silicon lines by single-exposure self-aligned spatial-frequency doubling
http://aip.metastore.ingenta.com/content/avs/journal/jvstb/25/6/10.1116/1.2801889
10.1116/1.2801889
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