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Impact of a barrier on metal-oxide-semiconductor capacitor electrical properties
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10.1116/1.3065437
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    Affiliations:
    1 Institut des Nanotechnologies de Lyon, Université de Lyon, INL-UMR 5270, CNRS, Ecole Centrale de Lyon, 36 Avenue Guy de Collongue, Ecully F-69134, France
    2 Institut des Nanotechnologies de Lyon, Université de Lyon, INL-UMR 5270, CNRS, INSA de Lyon, 7 Avenue Jean Capelle, Villeurbanne F-69621, France
    3 Institut des Nanotechnologies de Lyon, Université de Lyon, INL-UMR 5270, CNRS, Ecole Centrale de Lyon, 36 Avenue Guy de Collongue, Ecully F-69134, France
    4 Institut des Nanotechnologies de Lyon, Université de Lyon, INL-UMR 5270, CNRS, INSA de Lyon, 7 Avenue Jean Capelle, Villeurbanne F-69621, France
    5 Institut des Nanotechnologies de Lyon, Université de Lyon, INL-UMR 5270, CNRS, Ecole Centrale de Lyon, 36 Avenue Guy de Collongue, Ecully F-69134, France
    a) Author to whom correspondence should be addressed; Tel.: +33 (0)4 72 18 60 49; electronic mail: loic.becerra@ec-lyon.fr
    J. Vac. Sci. Technol. B 27, 384 (2009); http://dx.doi.org/10.1116/1.3065437
/content/avs/journal/jvstb/27/1/10.1116/1.3065437
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View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(Color online) Simulated current-voltage characteristics of 1 nm EOT and LAO gate stacks compared to 1 nm . Parameters used for simulations are metal gate work function ; : dielectric constant , effective electron mass , being the electron mass, band gap , potential barrier height at the silicon interface ; , , , ; , , , .

Image of FIG. 2.
FIG. 2.

TEM image showing 3.8 nm of amorphous on 0.8 nm of crystalline on a Si(001) substrate. The entire stack presents abrupt interfaces.

Image of FIG. 3.
FIG. 3.

(Color online) XPS spectra of core level (a) and LAO/Si samples before and after annealing in a tubular furnace under atmosphere at , (b) LAO/Si samples before and after annealing in a RTA furnace under atmosphere at 300, 400, 500, and , (c) samples before and after annealing in a RTA furnace under atmosphere at 300, 400, 500, and .

Image of FIG. 4.
FIG. 4.

(Color online) Frequency measurements from 1 kHz to 1 MHz on as-deposited MOS capacitors.

Image of FIG. 5.
FIG. 5.

(Color online) Comparison of experimental (1 MHz) and simulated characteristics of capacitors. (a) As-deposited and (b) after a PDA in a tubular furnace, .

Image of FIG. 6.
FIG. 6.

(Color online) Comparison of experimental (1 MHz) and simulated characteristics of capacitors, as deposited and after a RTA annealing .

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2009-02-09
2014-04-17
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Impact of a γ-Al2O3(001) barrier on LaAlO3 metal-oxide-semiconductor capacitor electrical properties
http://aip.metastore.ingenta.com/content/avs/journal/jvstb/27/1/10.1116/1.3065437
10.1116/1.3065437
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