Stack structures for STI, poly-Si, and contact application.
Evaluation of etch-clean delay time on post-etch residue removal and substrate loss for STI structures using TEM [(A) and (B)] and SEM [(C) and (F)] (1% HF, 2 s exposure time.)
Evaluation of delay time on residue removal after a TEOS hardmask-based poly-Si etch for a HF clean with exposure time resulting in 0.6 nm of oxide loss.
Evaluation of delay time on residue removal after a TEOS hardmask-based poly-Si etch for a more aggressive HF clean resulting in 2.6 nm of oxide loss.
Evaluation of HF concentration and net cleaning exposure (concentration × time) on residue removal for a poly-Si/PECVD gate etch with integrated wet clean.
Evaluation of net cleaning exposure on residue removal with a 24 h delay between poly-Si/PECVD gate etch and wet clean. [Compare to Figs. 4(E)–4(H).]
Influence of the storage condition relative humidity (RH) on the cleanability of residues generated in a detuned etch process for a poly-Si/TEOS stack (24 h delayed clean, 1% HF, 2 s exposure time).
Post-etch residue aging in a cleanroom ambient environment studied by thermodesorption mass spectrometry for primary species (A) and temperature ranges (B).
Within-wafer distribution of contact resistance for 90 nm Kelvin and chain structures as a function of delay time between dry etch/strip and APM clean, showing deteriorated performance with no or delayed cleaning.
Within-wafer distribution of contact resistance for 90 nm contact chain structures, comparing integrated vs delayed wet clean for APM and HF cleaning chemistries.
(a) HAADF TEM and (b) EELS evaluations of postcontact etch residue removal. The circled areas indicate an interfacial layer observed under the contact.
Compatibility of HF and APM with different materials in the contact film stack: material loss (nm) for a 2 s chemical exposure time.
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