Volume 29, Issue 2, March 2011
- electronic & optoelectronic materials, devices & processing
- energy conversion and storage devices
- nanometer science & technology
- microelectronic & nanoelectronic devices
- organic electronics and optoelectronics
- brief reports and comments
- 23rd international vacuum nanoelectronics conference
Index of content:
High-aspect-ratio inductively coupled plasma etching of InP using : Avoiding the effect of electrode coverplate material29(2011); http://dx.doi.org/10.1116/1.3546024View Description Hide Description
A new chemistry is proposed for the high-aspect-ratio etching of InP-based heterostructures.Anisotropicetching is obtained through the deposition of a passivation layer on the etched sidewalls. has been chosen as a single precursor for both Si and H species that are necessary to promote the passivation process. Previously developed - or HBr-based chemistries for anisotropicetching of laser waveguides or vertical microcavities require a silicon wafer below the InP samples in order to assist the passivation mechanism. In contrast, the authors show that a passivation can be achieved and maintained almost independent of the nature of the wafer surface when is added. This is of practical importance for the processing of III-V wafers having the same size as the electrode or for III-V heterogeneous integration when III-V dies bonded onto a 200/300 mm diameter wafer have to be etched. Smooth, notch-free, anisotropicetching of InGa(Al)As/InP heterostructures is demonstrated. Ex situ energy-dispersive x-ray spectroscopy coupled to a transmission electron microscope is used to analyze the composition of the thin passivation layer deposited on the sidewalls of etched features. The authors show that the passivation layer consists of a Si-rich silicon oxide in chemistry and is changed to nanocrystalline Si in chemistry depending on the concentration in the feed gas. An aspect ratio as high as 28 is obtained in the latter case.
Fabrication of cone-shaped subwavelength structures by utilizing a confined convective self-assembly technique and inductively coupled-plasma reactive-ion etching29(2011); http://dx.doi.org/10.1116/1.3556962View Description Hide Description
Cone-shaped subwavelength structures (SWSs) were fabricated on a GaAs substrate by utilizing a confined convective self-assembly process followed by inductively coupled-plasma reactive-ion etching. A self-assembled polystyrene monolayer was used as an etch mask for pattern transfer onto the GaAs substrate. The fabricated SWS, having a cone profile with an aspect ratio of 1.5 and a 300 nm pitch, exhibited very low reflectance throughout the solar spectrum range and exhibited wide tolerance to different optical incidence angles. Reflectance of the cone-shaped SWS on the GaAs surface was less than 4% in a spectral range of 300–1000 nm under a normal incidence condition.
Finite-element simulations of the effect of device design on channel temperature for AlGaN/GaN high electron mobility transistors29(2011); http://dx.doi.org/10.1116/1.3567183View Description Hide Description
The effect of device design on maximum channel temperature for AlGaN/GaN high electron mobility transistors was investigated through finite element thermal simulations for dissipated power densities up to . The effects of substrate material, die size, and number of gate fingers were examined, as well as the divergence between maximum channel temperatures for two dimensional and three dimensional simulations. The maximum temperature increased as the die size decreased beyond a critical distance from the gates. The critical distance was dependent on the substrate material, with SiC requiring the smallest critical distance. At the maximum dissipated power, the temperature increased above ambient more than for devices on sapphire substrates compared to an increase of for devices on SiC substrates. As the number of gate fingers increased, the maximum channel temperature also increased, and a temperature gradient was observed along the gate width as well as between gate fingers.
Quantitative study on the enhancement of sidewall coverage of sputter-deposited film by partially tapering the sidewall of via holes29(2011); http://dx.doi.org/10.1116/1.3567184View Description Hide Description
As the aspect ratio of a via increases, the film sputter-deposited inside the via suffers from poor step coverage. In this study, the authors introduced a partially tapered via and simulated the thickness profile of sputter-deposited film inside it. For the simulation, the directionality factor was introduced to the Monte Carlo method to consider the angular directionality of depositing atoms. The optimum partially tapered via, which has a maximum sidewall coverage, was obtained for various via dimensions (i.e., aspect ratios and bottom-to-entrance size ratios) and directionality factors of depositing atoms. The enhancement effect of the sidewall coverage by introducing an optimum partially tapered via was investigated quantitatively. The enhancement factor of an optimum partially tapered via is always greater than that of a fully tapered via. To achieve high sidewall coverage for high aspect ratio vias, it is suggested to deposit a film inside an optimum partially tapered via under the condition with high directionality.
29(2011); http://dx.doi.org/10.1116/1.3569626View Description Hide Description
Accurate analytical formulas for tunneling probability through a three-layer gate stack with semiconductor/metallic quantum well or without a quantum well were derived. For the case of a three-barrier stack (no quantum well) the authors derived a simplified analytical Wentzel–Krammers–Brillouin equivalent formula, which was generalized for the case of an -barrier stack. The tunneling through a three-layer stack with a quantum well was considered. The effect of scattering on tunneling probability and current-voltage characteristics of the double-barrier metal-oxide-semiconductor system was investigated.
29(2011); http://dx.doi.org/10.1116/1.3545808View Description Hide Description
The authors analyze the collective buckling of an array of elastic lines with their lower edges built into an elastic substrate of the same material. These lines can interact among themselves through the deformation of the substrate. From the theory of elasticity and elastic structures, an eigenvalue problem is formulated and solved. Calculations show that the lines can buckle collectively into certain ordered patterns, where some of which have been confirmed by experiments. The results are useful for the understanding, design, and application of the nanostructures produced by soft lithography and other embossing techniques.
Annealing temperature dependence of Ohmic contact resistance and morphology on InAlN/GaN high electron mobility transistor structures29(2011); http://dx.doi.org/10.1116/1.3545811View Description Hide Description
Ti/Al/Ni/Au Ohmic contact metallization on InAlN/GaN heterostructures both with and without a thin GaN cap layer was annealed at different temperatures. The minimum transfer resistance for the contacts of (specific contact resistivity of ) was achieved after annealing for structures without the GaN cap, while those with the cap exhibited their lowest resistance at higher temperatures. The contact morphology showed considerable roughening by but the carrier mobility was stable until annealing temperatures of . Diffuse scattering experiments showed that the morphological roughness of the InAlN/GaN interface increased as a result of annealing at these temperatures and the data were consistent with outdiffusion of Ga into the InAlN. Unpassivated high electron mobility transistors with a gate dimension of were fabricated using these contacts and showed a maximum drain current of 1.3 A/mm and an extrinsic transconductance of 366 mS/mm. The presence of the GaN cap increased the effective barrier height of Ni/Au Schottky contacts from 0.91 to 1.01 eV on the heterostructure.
29(2011); http://dx.doi.org/10.1116/1.3546100View Description Hide Description
Contact hole patterning has always been one of the most challenging issues in lithography. Conventional optical proximity correction (OPC) approach for contact hole patterning involves dimensional biasing, addition of serifs at corners, and insertion of subresolution enhancement features. However, as dimensions reduce, process window enhancement resulted from conventional OPC approach encounters limitations. In this paper, a new approach for contact hole patterning is investigated. Instead of using a square shape as target of a printed feature, a circular shape is proposed. Using the proposed method improvement in aerial image quality is achieved and the average improvement in the depth of focus is around 11%. In addition, the average normalized image logarithmic slope improvement for different pitches is found to be around 15%.
29(2011); http://dx.doi.org/10.1116/1.3545696View Description Hide Description
A nonpolar -plane GaN-based light emitting structure was patterned by self-assembled nanosphere lithography and subsequent inductively coupled plasma(ICP)etch to define an array of nanopillar light emitters. The photoluminescence(PL) intensity was enhanced by after the anisotropic ICPetch, compared with an unprocessed sample, which is attributed to a reduction in wave-guiding effects in the thin film. Additionally, the anisotropic ICPetch caused minimal wavelength shift in the dominant 3.34 eV near-bandedge radiative transition. A subsequent photoelectrochemical (PEC)etch process of the -plane GaNnanopillars preferentially etched the underlying -type layers, leaving a wider -type cap. The -type layers wet-etched by recession of the N-polar (000-1) plane (perpendicular to the -plane growth axis) via formation of the distinctive pyramid-shaped facets. The PL intensity was enhanced by after ICP and PECetching although the peak emission occurred at a lower energy. The combination of nanosphere lithography and ICP was highly effective in improving the light extraction efficiency in -plane nonpolar GaN-based light emitting diodes.
Reduction of structural defects in -plane GaN epitaxy by use of periodic hemispherical patterns in -plane sapphire substrates29(2011); http://dx.doi.org/10.1116/1.3545801View Description Hide Description
Using hemisphere-shaped patterned-plane sapphire substrates, high quality nonpolar -plane gallium nitride(GaN)films have been obtained with superior structural characteristics to filmsgrown on conventional (unpatterned) -plane sapphire. This is evidenced by reduced x-ray rocking curve widths, smaller in-plane crystallographic anisotropy, and smoother surface morphology. Observations by transmission electron microscopy and cathodoluminescence reveal that the defect density is remarkably reduced in regions above the patterned hemispheres. The growth of -plane GaN on the patterned substrates proceeds first by a relatively fast growth of the film on the flat surface region, and then a gradual lateral overgrowth over the protruding hemispheres, where the direct epitaxialgrowth is severely retarded.
Inductively coupled plasma etching of high aspect ratio two-dimensional photonic crystals in Al-rich AlGaAs and AlGaAsSb29(2011); http://dx.doi.org/10.1116/1.3549125View Description Hide Description
Planar two-dimensional photonic crystals are key tools for the development of advanced optoelectronic devices. However, their practical realization often requires deep etching of air holes with high aspect ratio. In this article, the authors report on a time-multiplexed inductively coupled plasma reactive ion etching technique, allowing deep etching of AlGaAs and AlGaAsSb heterostructures. Air holes of 130 nm wide and deep have been realized in AlGaAsheterostructures with up to 60% Al.
Fabrication of sub-100-nm metal-oxide-semiconductor field-effect transistors with asymmetrical source/drain using I-line double patterning technique29(2011); http://dx.doi.org/10.1116/1.3551527View Description Hide Description
The authors present a simple double patterning technique with I-line stepper to define nanoscale structures and have successfully fabricated-channel metal-oxide-semiconductor field-effect transistors(MOSFETs) with sub-100-nm gate length. With this approach, polycrystalline silicon (poly-Si) gate with linewidth down to 80 nm could be formed with good control, which far exceeds the resolution limit of conventional I-line lithography. Moreover, ineffectiveness of end point detection in the second poly-Si gate definition is also addressed. For reliable process control in the second etching step, appropriate mask design is found to be essential. Finally, sub-100-nm MOSFETs with or without halo implemented symmetrically or asymmetrically are fabricated and characterized.
Low temperature processing of indium-tin-zinc oxide channel layers in fabricating thin-film transistors29(2011); http://dx.doi.org/10.1116/1.3553205View Description Hide Description
The authors report on the fabrication of thin-film transistors(TFTs) using indium-tin-zinc oxides (ITZOs) as active channel layers. Transparent amorphous ITZO semiconductors were deposited at room temperature by rf-magnetron sputtering, followed by an annealing treatment at . The electrical properties of the ITZO channel layers deposited at room temperature using rf-magnetron sputtering were investigated by controlling the oxygen partial pressure during deposition and introducing postannealing treatments. The devices operated in an -type enhancement mode exhibited a clear pinch-off behavior and had an on-to-off ratio of with a low off current of . A field-effect mobility of and a subthreshold slope of 0.5 V/decade were extracted from the device characteristics. These results suggest that ITZO semiconductors show potential as channel materials that are applicable in flexible transparent TFTs.
29(2011); http://dx.doi.org/10.1116/1.3549132View Description Hide Description
Multiwalled nanotubes and nanoparticles of metal dichalcogenides express unique mechanical and tribological characteristics. A widely studied member of this class of materials is the nanotube whose structure consists of layers of covalent W-S bonds joined by the van der Waals interactions between the sulfur layers which mediate any interlayer sliding or compression. One of the intriguing aspects of these structures is the response of these layers under mechanical stress. Such internal degrees of freedom can profoundly impact on the overall mechanical response. The fact that the internal structure of these nanotubes is well characterized enables a full treatment of the problem. Here, the authors report an experimental and modeling study of the radial mode of deformation. Three independent atomic force microscope experiments were employed to measure the nanomechanical response using both large and small probe tips. Two different analytical models were applied to analyze the results. The modulus values derived from the analytical models were used as initial input for a finite element analysis model to yield a refined value of this parameter. The obtained values compare favorably with density functional tight binding calculations. The results indicate a strong influence of interwall shear on the radial modulus.
29(2011); http://dx.doi.org/10.1116/1.3553209View Description Hide Description
Electronic devices based on tunnel junctions require tools able to accurately control the thickness of thin metal and oxide layers on the order of the nanometer. This article shows that multisample ellipsometry is an accurate method to reach this goal on plain uniform layers, in particular for titanium. From these measurements, the authors carefully studied the oxidation rate of titaniumthin films in an oxygen plasma. The authors found that the oxide thickness saturates at after 10 min in the plasma with an ion acceleration power of 30 W. Increasing this power to 240 W increases the saturation value to . An x-ray photoelectron spectroscopy study of the oxide has shown that the oxide created by plasma is stoichiometric . The developed model was also used to measure the thicknesses of titanium and titanium oxide layers that have been polished using a chemical mechanical planarization process and a material removal rate of 5.9 nm/min is found with our planarization parameters.
Combination of thermodynamic model and precursor state for As and Sb incorporation behavior in GaAsSb/GaAs multiple-quantum wells29(2011); http://dx.doi.org/10.1116/1.3554399View Description Hide Description
The competition between two group V atoms is significant in epitaxygrowth and it is attributable to the higher difference of incorporation rates and the characteristics of atoms themselves. It could result such that atoms join into the lattice with difficulty, which could promote desorption of extra atoms that have escaped from among incident molecules. The authors have developed a combination for the precursor state and the associated thermodynamic model in order to describe the competition between Sb and As atoms during the pseudomorphic growth of GaAsSb/GaAs multiple-quantum wells on GaAs (100) substrates by gas-source molecular-beam epitaxy. The strain-induced incorporation coefficient due to lattice mismatch between the growing film and the substrate is also taken into account. The calculated results for the model are in good agreement with the experimental data at different substrate temperatures.
29(2011); http://dx.doi.org/10.1116/1.3554404View Description Hide Description
In this work, nanospherelithography was integrated with standard microfabrication for the wafer-scale fabrication of silicon nitride (SiN) membranes with arrays of submicrometer holes. A monolayer of polystyrene (PS) beads with a mean diameter of 428 or 535 nm was spin coated onto the front side of a (100)-silicon wafer double-side coated with 100 nm of low-stress SiN. The size of the deposited PS beads was reduced by oxygen plasma reactive ion etching. This allowed to tune the hole size in the released SiN membrane while maintaining the hole array periodicity. Using the size-reduced PS beads as a lift-off template in a standard nanospherelithography lift-off procedure, a 20 nm thick chromium hole etch mask was realized. This hole mask was patterned by UV photolithography, thus allowing for the local dry-etching of holes into the SiN layer. The holey areas were released from the backside in a combined Si dry- and wet-etch process. During the final wet etch, the wafer front side was protected with a KOH-resistant polymeric coating (ProTEK®). In this way, holey SiN membranes with side lengths ranging from up to 2.4 mm were fabricated. Preliminary application specific experiments show the membranes’ suitability for microfiltration and stencil applications.
Fabrication of metal nanowires by ion-beam irradiation of oxides through high aspect ratio resist masksa)29(2011); http://dx.doi.org/10.1116/1.3548875View Description Hide Description
A method of ion-beam-induced reduction in oxides is used to produce metal-bismuth nanowires embedded into a matrix of a highly insulating dielectric—bismuth oxide. The metal film is formed in the process of reduction of the metal oxide by selective removal of oxygen atoms under irradiation by the beam of protons through a mask. The mask containing pairs of parallel nanowires with contact pads was fabricated using 50 kV electron-beam lithography in a single layer of 200-nm-thick ZEP-520 (Zeon Chemicals L.P., ZEP-520 electron-beam resist) electron-beam resist.Electrical properties of the fabricatednanowires have been studied. Broadening of the fabricated metal wires with respect to the initial mask width was found to be dependent on the energy of irradiating protons. This effect may be attributed to the scattering of protons in the oxide-film. It is shown that the method of selective atom removal combined with high aspect ratio e-beam lithography is a feasible technique for fabrication of metal nanowires embedded in a dielectric matrix of metal oxide.
29(2011); http://dx.doi.org/10.1116/1.3548876View Description Hide Description
Silicon (Si) nanostructuresolar cells have been synthesized using a nanowire (NW) array as the surface texturing. Optical-reflection measurement exhibits an excellent photon-harvesting property for the Si-NW-array texturization. Less than 2% reflection ratio at an 800 nm wavelength was achieved. Results show that an optimized Si nanostructuresolar cell with an excellent photon-harvesting property has a 35.4% higher energy-conversion efficiency than the -Si solar cell due to its enhanced optical-absorption characteristics. However, for the nanostructured solar cells, the decrease in external quantum efficiencies in the short-wavelength region proves that the surface recombination plays a critical role in determining the final quantum-efficiency performance, indicating that optimum surface passivation was a prerequisite in high-efficiency Si nanostructuresolar cells.
29(2011); http://dx.doi.org/10.1116/1.3554638View Description Hide Description
A custom-made copolymer of a perfluoropolyether (PFPE) and a hyperbranched polymer (HP) was employed to prepare an UV-based nanoimprinting lithographic (NIL) flexible HPFPE stamp. The properties of the HP afforded the resultant HPFPE resist with low viscosity, suitable surface energy, high Young’s modulus, and enhanced stability. The HPFPE resist also presented excellent properties of antisticking, and durability, no deformation, or distortion after long time usage; therefore, demonstrating an improvement in the NIL pattern transfer fidelity and resolution. By optimizing the UV-based NIL process with this flexible HPFPE stamp, the imprinting results showed near zero residues at the bottom of the resist grooves, and no sticking over a large area. The structure of the HPFPE flexible stamp was transferred intact onto a soft substrate indium tin oxide/polyethylene terephthalate film with good resolution, achieving a 50 nm linewidth and a 200 nm period.