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As semiconductor based devices are manufactured on ever thinner silicon substrates, the required associated die break strength has to increase commensurately to maintain pick yields. In this study, the influence of laser processing parameters on the die break strength in laser dicing of silicon oxide-coated silicon wafers and silicon-based memory devices is investigated experimentally using ultraviolet lasers spanning a wide range of pulse width, from 400 fs to 150 ns. It is found that the net fluence, an accumulated pulse energy per surface area, is a meaningful process metric for damage induced by heat-affect zone to compare lasers processes with a large variety of pulse widths, laser scan speed, average powers, and repetition rates. Optimized process conditions for both nanosecond and femtosecond pulse widths are identified for achieving the highest die break strength in the target devices. The dependence of heat-affected zone on pulse width and net fluence during nanosecond laser processing is further demonstrated using multiphysical simulations. Simulations suggest that the thickest heat-affected zone section during laser scribing is typically located at the boundary of the laser incident surface. Simulation results also show that for a given repetition rate the heat-affected zone becomes larger as the net fluence increases due to smaller interpulse separation, consistent with the experimental observation.


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