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Integration of self-assembled diblock copolymers for semiconductor capacitor fabrication

Appl. Phys. Lett. 79, 409 (2001); doi:10.1063/1.1383805

Issue Date: 16 July 2001

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C. T. Black, K. W. Guarini, and K. R. Milkove
IBM T. J. Watson Research Center, Yorktown Heights, New York 10598

S. M. Baker, T. P. Russell, and M. T. Tuominen
University of Massachusetts, Amherst, Massachusetts 01003
We combine a self-organizing diblock copolymer system with semiconductor processing to produce silicon capacitors with increased charge storage capacity over planar structures. Our process uses a diblock copolymer thin film as a mask for dry etching to roughen a silicon surface on a 30 nm length scale, which is well below photolithographic resolution limits. Electron microscopy correlates measured capacitance values with silicon etch depth, and the data agree well with a geometric estimate. This block copolymer nanotemplating process is compatible with standard semiconductor processing techniques and is scalable to large wafer dimensions. ©2001 American Institute of Physics.
History: Received 23 February 2001; accepted 11 May 2001
Permalink: http://link.aip.org/link/?APPLAB/79/409/1
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KEYWORDS and PACS

Keywords
PACS
  • 81.05.Lg
    Materials science Specific materials: fabrication, treatment, testing and analysis Polymers and plastics; rubber; synthetic and natural fibers; organometallic and organic materials
  • 81.16.Dn
    Materials science Methods of nanofabrication and processing Self-assembly
  • 84.32.Tt
    Electronics; radiowave and microwave technology; direct energy conversion and storage Passive circuit components Capacitors
  • 81.65.Cf
    Materials science Surface treatments Surface cleaning, etching, patterning
  • YEAR: 2001

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PUBLICATION DATA

ISSN:
0003-6951 (print)   1077-3118 (online)
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