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Solution-processed flexible organic transistors showing very-low subthreshold slope with a bilayer polymeric dielectric on plastic

Appl. Phys. Lett. 94, 203301 (2009); doi:10.1063/1.3133902

Published 18 May 2009

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Zihong Liu,1 Joon Hak Oh,2 Mark E. Roberts,2 Peng Wei,2 Bipul C. Paul,1,3 Masaki Okajima,3 Yoshio Nishi,1 and Zhenan Bao2
1Department of Electrical Engineering, Stanford University, 350 Serra Mall, Stanford, California 94305, USA
2Department of Chemical Engineering, Stanford University, 381 North-South Mall, Stanford, California 94305, USA
3Toshiba America Research Inc., San Jose, California 95131, USA

We demonstrate low-voltage, solution-processed organic transistors on rough plastic substrates with a carrier mobility over 0.2  cm2/V s, a turn-on voltage of near 0 V, and a record low subthreshold slope of ~80  mV/decade in ambient conditions. These exceptional characteristics are attributed to (1) a device stacking architecture with a conducting polymeric gate and a double layered dielectric composed of low-temperature cross-linked poly(4-vinylphenol), (2) a low interface trap density achieved by modifying the dielectric surface with a phenyl-terminated self-assembled monolayer from 4-phenylbutyltrichlorosilane, and (3) controlled crystallization of a small-molecule organic semiconductor film with favorable charge transport microstructure and a low bulk trap density as deposited by an optimized solution-shearing process. The device performance under different operating voltages was also examined and discussed. ©2009 American Institute of Physics
History: Received 19 February 2009; accepted 6 March 2009; published 18 May 2009
Permalink: http://link.aip.org/link/?APPLAB/94/203301/1
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